T7234A-ML-DT View Datasheet(PDF) - Agere -> LSI Corporation

Part Name

Description

Manufacturer

T7234A-ML-DT

Compliance with the New ETSI PSD Requirement

Agere -> LSI Corporation 

Data Sheet

January 1998

T7256 Single-Chip NT1 (SCNT1) Transceiver

Microprocessor Interface Description (continued)

Timing

The microprocessor interface is compatible with any microprocessor that supports a synchronous serial micropro-

cessor port such as the following:

s NEC1 75402

s Motorola 2 MC68HC05 and MC68302 SCP port

s Intel 3 80C51

T7256

11

INT

15

SCK

14

SDO

12

SDI

INTERRUPT IN

CLOCK OUT

NEC OR

Motorola

DATA IN MICROPROCESSOR

DATA OUT

Figure 12. NEC and Motorola Microprocessor Port Connections

5-2300 (C)

The synchronous interface consists of the microprocessor input clock (SCK), serial data input (SDI), and serial

data output (SDO). A microprocessor interrupt lead (INT) is also included. These connections are shown in Figure

12 for applications using either NEC or Motorola microprocessors. Figure 13 shows the connections for applica-

tions using a multiplexed data out/in scheme such as the Intel 80C51 or equivalent.

T7256

11

INT

15

SCK

14

SDO

12

SDI

INTERRUPT IN

CLOCK OUT

Intel

80C51

OR EQUIVALENT

MICROPROCESSOR

DATA OUT/IN

Figure 13. Intel Microprocessor Port Connections

1. NEC is a registered trademark of NEC Electronics, Inc.

2. Motorola is a registered trademark of Motorola, Inc.

3. Intel is a registered trademark of Intel Corporation.

5-2301 (C)

Lucent Technologies Inc.

39

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