PIC12F508/509/16F505
7.7 Time-out Sequence, Power-down
and Wake-up from Sleep Status
Bits (TO, PD, GPWUF/RBWUF)
The TO, PD and (GPWUF/RBWUF) bits in the
STATUS register can be tested to determine if a Reset
condition has been caused by a Power-up condition, a
MCLR or Watchdog Timer (WDT) Reset.
TABLE 7-8: TO/PD/(GPWUF/RBWUF)
STATUS AFTER RESET
GPWUF/
RBWUF
TO
PD
Reset Caused By
0
0 0 WDT wake-up from Sleep
0
0 u WDT time-out (not from
Sleep)
0
1 0 MCLR wake-up from Sleep
0
1 1 Power-up
0
u u MCLR not during Sleep
1
1 0 Wake-up from Sleep on pin
change
Legend: u = unchanged
Note 1:
The TO, PD and GPWUF/RBWUF bits
maintain their status (u) until a Reset
occurs. A low-pulse on the MCLR input
does not change the TO, PD and
GPWUF/RBWUF Status bits.
7.8 Reset on Brown-out
A brown-out is a condition where device power (VDD)
dips below its minimum value, but not to zero, and then
recovers. The device should be reset in the event of a
brown-out.
To reset PIC12F508/509/16F505 devices when a
brown-out occurs, external brown-out protection
circuits may be built, as shown in Figure 7-12 and
Figure 7-13.
FIGURE 7-12:
VDD
33k
10k
BROWN-OUT
PROTECTION CIRCUIT 1
VDD
PIC16F505
PIC12F508
Q1 MCLR(2)PIC12F509
40k(1)
FIGURE 7-13:
VDD
R1
R2
BROWN-OUT
PROTECTION CIRCUIT 2
VDD
PIC16F505
PIC12F508
Q1 MCLR(2) PIC12F509
40k(1)
Note 1:
2:
This brown-out circuit is less expensive,
although less accurate. Transistor Q1 turns
off when VDD is below a certain level such
that:
VDD •
R1
= 0.7V
R1 + R2
Pin must be confirmed as MCLR.
FIGURE 7-14:
BROWN-OUT
PROTECTION CIRCUIT 3
VDD
MCP809 Bypass
VSS
Capacitor
VDD
RST
VDD
MCLR
PIC16F505
PIC12F508
PIC12F509
Note:
This brown-out protection circuit employs
Microchip Technology’s MCP809 micro-
controller supervisor. There are 7 different
trip point selections to accommodate 5V to
3V systems.
Note 1:
2:
This circuit will activate Reset when VDD goes
below Vz + 0.7V (where Vz = Zener voltage).
Pin must be confirmed as MCLR.
DS41236E-page 54
© 2009 Microchip Technology Inc.