PIC12F508-I/SL View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
PIC12F508-I/SL Datasheet PDF : 110 Pages
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PIC12F508/509/16F505
TABLE 10-5: TIMING REQUIREMENTS – PIC12F508/509/16F505
Standard Operating Conditions (unless otherwise specified)
AC
Operating Temperature -40°C ≤ TA ≤ +85°C (industrial)
CHARACTERISTICS
-40°C ≤ TA ≤ +125°C (extended)
Operating Voltage VDD range is described in Section 10.1 "Power-on Reset (POR)"
Param
No.
Sym.
Characteristic
Min. Typ(1) Max. Units
17
TOSH2IOV OSC1↑ (Q1 cycle) to Port Out Valid(2), (3)
—
—
100*
ns
18
TOSH2IOI OSC1↑ (Q2 cycle) to Port Input Invalid (I/O in hold time)(2) 50
—
—
ns
19
TIOV2OSH Port Input Valid to OSC1↑ (I/O in setup time)
20
TIOR
Port Output Rise Time(3)
20
—
—
ns
—
10
25**
ns
21
TIOF
Port Output Fall Time(3)
—
10
25**
ns
* These parameters are characterized but not tested.
** These parameters are design targets and are not tested.
Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design
guidance only and are not tested.
2: Measurements are taken in EXTRC mode.
3: See Figure 10-3 for loading conditions.
FIGURE 10-6:
RESET, WATCHDOG TIMER AND DEVICE RESET TIMER TIMING –
PIC12F508/509/16F505
VDD
MCLR
Internal
POR
32
DRT
Timeout(2)
Internal
Reset
Watchdog
Timer
Reset
I/O pin(1)
30
32
32
31
34
34
Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software.
2: Runs in MCLR or WDT Reset only in XT, LP and HS (PIC16F505) modes.
DS41236E-page 78
© 2009 Microchip Technology Inc.
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