L6470H(2012) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

L6470H
(Rev.:2012)

dSPIN™ fully integrated microstepping motor driver with motion engine and SPI

STMicroelectronics 

L6470

6

Functional description

Functional description

6.1

Device power-up

At power-up end, the device state is the following:

● Registers are set to default

● Internal logic is driven by internal oscillator and a 2 MHz clock is provided by the

OSCOUT pin

● Bridges are disabled (High Z)

● UVLO bit in the STATUS register is forced low (fail condition)

● FLAG output is forced low.

During power-up, the device is under reset (all logic IOs disabled and power bridges in high

impedance state) until the following conditions are satisfied:

● VS is greater than VSthOn

● VREG is greater than VREGth = 2.8 V typical

● Internal oscillator is operative.

Any motion command makes the device exit from High Z state (HardStop and SoftStop

included).

6.2

Logic I/O

Pins CS, CK, SDI, STCK, SW and STBY\RST are TTL/CMOS 3.3 V - 5 V compatible logic

inputs.

Pin SDO is a TTL/CMOS compatible logic output. VDD pin voltage sets the logic output pin

voltage range; when it is connected to VREG or 3.3 V external supply voltage, the output is

3.3 V compatible. When VDD is connected to a 5 V supply voltage, SDO is 5 V compatible.

VDD is not internally connected to VREG, an external connection is always needed.

A 10 µF capacitor should be connected to the VDD pin in order to obtain a proper operation.

Pins FLAG and BUSY\SYNC are open drain outputs.

6.3

Charge pump

To ensure the correct driving of the high-side integrated MOSFETs, a voltage higher than

the motor power supply voltage needs to be applied to the VBOOT pin. The high-side gate

driver supply voltage, Vboot, is obtained through an oscillator and a few external components

realizing a charge pump (see Figure 5).

Doc ID16737 Rev 5

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