ST92F150CV1T3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST92F150CV1T3
STMicroelectronics
ST92F150CV1T3 Datasheet PDF : 430 Pages
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ST92124xxx-Auto/ST92150xxxxx-Auto
ST92250xxxx-Auto
8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM,
E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD
■ Memories
– Internal Memory: Single Voltage FLASH up to 256
Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulat-
ed EEPROM)
– In-Application Programming (IAP)
– 224 general purpose registers (register file) availa-
ble as RAM, accumulators or index pointers
■ Clock, Reset and Supply Management
– Register-oriented 8/16 bit CORE with RUN, WFI,
SLOW, HALT and STOP modes
– 0-24 MHz Operation (Int. Clock), 4.5-5.5 V range
– PLL Clock Generator (3-5 MHz crystal)
– Minimum instruction time: 83 ns (24 MHz int. clock)
■ Up to 80 I/O pins
■ Interrupt Management
– 4 external fast interrupts + 1 NMI
– Up to 16 pins programmable as wake-up or addition-
al external interrupt with multi-level interrupt handler
■ DMA controller for reduced processor
overhead
■ Timers
– 16-bit Timer with 8-bit Prescaler, and Watchdog Tim-
er (activated by software or by hardware)
– 16-bit Standard Timer that can be used to generate
a time base independent of PLL Clock Generator
– Two 16-bit independent Extended Function Timers
(EFTs) with Prescaler, up to two Input Captures and
up to two Output Compares
– Two 16-bit Multifunction Timers, with Prescaler, up
to two Input Captures and up to two Output Com-
pares
DEVICE SUMMARY(1)
Device
Flash(2) RAM(2) E3 TM(2)
ST92124R9T-Auto
64K 2K
ST92124V1Q-Auto
ST92124V1T-Auto
128K
4K
6K
ST92150CR9T-Auto
ST92150CV9T-Auto
64K
2K
ST92150CV1Q-Auto
1K
ST92150CV1T-Auto
ST92150JDV1Q-Auto 128K 6K
ST92150JDV1T-Auto
ST92250CV2Q-Auto
ST92250CV2T-Auto
256K
8K
Timers
2xMFT,
2xEFT,
STIM,
WD
1) See Table 72 on page 405 for the list of supported part numbers
2) Bytes
3) See Section 12.5 on page 408 for important information
LQFP64
14x14
PQFP100
14x20
LQFP100
14x14
■ Communication Interfaces
– Serial Peripheral Interface (SPI) with Selectable
Master/Slave mode
– One Multiprotocol Serial Communications Interface
with asynchronous and synchronous capabilities
– One asynchronous Serial Communications Interface
with 13-bit LIN Synch Break generation capability
– J1850 Byte Level Protocol Decoder (JBLPD)
– Up to two full I²C multiple Master/Slave Interfaces
supporting Access Bus
– Up to two CAN 2.0B Active interfaces
■ Analog peripheral (low current coupling)
– 10-bit A/D Converter with up to 16 robust input chan-
nels
■ Development Tools
– Free High performance Development environment
(IDE) based on Visual Debugger, Assembler, Linker,
and C-Compiler; Real Time Operating System (OS-
EK OS, CMX) and CAN drivers
– Hardware Emulator and Flash Programming Board
for development and ISP Flasher for production
Serial Interface
SCI, SPI, I²C
2xSCI, SPI, I²C
SCI, SPI, I²C
2xSCI, SPI, I²C
2xSCI, SPI, I²C
2xSCI, SPI, I²C
2xSCI, SPI,
2xI²C(3)
ADC Network Interface Packages
-
LQFP64
LIN Master
PQFP100
LQFP100
CAN
LQFP64
CAN, LIN Master LQFP100
16 x 10
bits
CAN
PQFP100
LQFP100
2 CAN, J1850, PQFP100
LIN Master LQFP100
CAN,
PQFP100
LIN Master LQFP100
Rev. 1
September 2007
1/430
9
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