ST92F250CV2QBTR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST92F250CV2QBTR

8/16-bit single voltage Flash MCU family with RAM, E³ TM (emulated EEPROM), CAN 2.0B and J1850 BLPD

STMicroelectronics 

ST92F124xx/ST92F150Cxx/ST92F150JDV1/ST92F250CV2

Known limitations

- the identifier field (10 bits).

Every LIN frame starts with a break character. Adding an idle character increases the length

of each header by 10 bits. When the problem occurs, the header length is increased by 11

bits and becomes ((14+11)+10+10+1)=45 bits.

To conclude, the problem is not always critical for LIN communication if the software keeps

the time between the sync field and the ID smaller than 4 bits, i.e. 208us at 19200 baud.

The workaround is the same as for SCI mode but considering the low probability of

occurrence (1%), it may be better to keep the break generation sequence as it is.

17.8.10

LIN master mode not available on SCI-A

LIN Synch Breaks (13 low bits) generation is not possible on SCI-A. LINE bit has no effect

on break length.

17.8.11 Limitations on LQFP64 devices

AIN[7:0] not available on LQFP64 devices

ADC Channels from AIN0 to AIN7 are not present on LQFP64 devices.

EFT0 and EFT1 not available on LQFP64 devices

Extended Function Timers are not present on LQFP64 devices.

Doc ID 8848 Rev 7

521/523

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