JS28F128P30BF65 View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
Manufacturer
JS28F128P30BF65
Numonyx -> Micron
JS28F128P30BF65 Datasheet PDF : 90 Pages
| |||
P30-65nm SBC
Figure 35: Buffer Program Flowchart
Start
Device
Supports Buffer
No
Writes?
Yes
Set Timeout or
Loop Counter
Yes
Clear Status Register
50h
Address within Device
Get Next
Target Address
Use Single Word
Programming
Issue Write to Buffer
Command E8h
Block Address
Read Status Register
Block Address
(note 7)
Is WSM Ready ?
SR. 7=
0 = No
1 = Yes
Write Word Count
Block Address
No
Timeout
or Count
Expired ?
Yes
Write Buffer Data
Start Address
X = X +1
X =0
X =N?
No
Yes
Write Confirm D0h
Block Address
Write Buffer Data
Address within buffer range
No
Abort Bufferred
Program?
Yes
Write to another
Block Address
Read Status Register
SR. 7=?
0
1
Full Status
Check if Desired
Buffered Program
Aborted
No
Suspend
Yes
Program
Yes Another Buffered
Programming?
No
Program Complete
Suspend
Program
Loop
Bus
Operation
Command
Comments
Write
Write to
Buffer
Data =E8H
Addr = Block Address
Read
(Note 7)
SR. 7 = Valid
Addr = Block Address
Standby
Check SR.7
1 = Device WSM is Busy
0 = Device WSM is Ready
Write
( Notes1 , 2)
Data =N- 1 = Word Count
N = 0 corresponds to count=1
Addr = Block Address
Write
( Notes3 , 4)
Data = Write Buffer Data
Addr =Address within buffer range
Write
( Notes5 , 6)
Data = Write Buffer Data
Addr = Block Address
Write
Program Data =D0H
Confirm Addr = Block Address
Read
Status register Data
CE# and OE# low updates SR
Addr = Block Address
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Notes:
1. Word count values on DQ 0-DQ15 are loaded into the Count .
register. Count ranges for this device are N=0000h to 00FFh.
2. The device outputs the Status Register when read.
3. Write Buffer contents will be programmed at the device start
address or destination flash address .
4. Align the start address on a Write Buffer boundary for
maximum programming performance (i.e., A8-A1 of the start
address =0).
.
5. The device aborts the Buffered Program command if the
current address is outside the original block address .
.
6. The Status register indicates an “improper command
Sequence” if the Buffered Program command is aborted.
Follow this with a Clear Status Register command .
7. The device defaults to output SR data after the Buffered
Programming Setup Command (E8h) is issued . CE# or OE#
must be be toggled to update Status Register . Don’t issue the
Read SR command (70h), which would be interpreted by the
internal state machine as Buffer Word Count.
8. Full status check can be done after all erase and write
sequences complete . Write FFh after the last operation to
reset the device to read array mode.
Datasheet
76
Apr 2010
Order Number: 208033-02
Share Link: 