STM32F217REH6V View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F217REH6V

ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM, crypto, USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera

STMicroelectronics 

STM32F21xxx

Electrical characteristics

Figure 55. Asynchronous multiplexed PSRAM/NOR read waveforms

tw(NE)

FSMC_NE

tv(NOE_NE)

t h(NE_NOE)

FSMC_NOE

FSMC_NWE

FSMC_A[25:16]

FSMC_NBL[1:0]

FSMC_AD[15:0]

FSMC_NADV

t w(NOE)

tv(A_NE)

tv(BL_NE)

Address

NBL

th(A_NOE)

th(BL_NOE)

t v(A_NE)

Address

t v(NADV_NE)

tw(NADV)

tsu(Data_NE)

tsu(Data_NOE)

Data

th(AD_NADV)

th(Data_NE)

th(Data_NOE)

ai14892b

Table 71. Asynchronous multiplexed PSRAM/NOR read timings(1)(2)

Symbol

Parameter

Min

Max

Unit

tw(NE) FSMC_NE low time

3THCLK-1

3THCLK+1

ns

tv(NOE_NE) FSMC_NEx low to FSMC_NOE low

2THCLK

2THCLK+0.5

ns

tw(NOE) FSMC_NOE low time

THCLK-1

THCLK+1

ns

th(NE_NOE) FSMC_NOE high to FSMC_NE high hold time

0

-

ns

tv(A_NE) FSMC_NEx low to FSMC_A valid

-

2

ns

tv(NADV_NE) FSMC_NEx low to FSMC_NADV low

1

2.5

ns

tw(NADV) FSMC_NADV low time

THCLK– 1.5

THCLK

ns

th(AD_NADV)

FSMC_AD(adress) valid hold time after

FSMC_NADV high)

THCLK

-

ns

th(A_NOE) Address hold time after FSMC_NOE high

THCLK

-

ns

th(BL_NOE) FSMC_BL time after FSMC_NOE high

0

-

ns

tv(BL_NE) FSMC_NEx low to FSMC_BL valid

-

1

ns

tsu(Data_NE) Data to FSMC_NEx high setup time

THCLK+ 2

-

ns

tsu(Data_NOE) Data to FSMC_NOE high setup time

THCLK+ 3

-

ns

th(Data_NE) Data hold time after FSMC_NEx high

0

-

ns

th(Data_NOE) Data hold time after FSMC_NOE high

0

-

ns

1. CL = 30 pF.

2. Based on characterization, not tested in production.

Doc ID 17050 Rev 8

125/173

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