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STM32F215RET6 View Datasheet(PDF) - STMicroelectronics

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STM32F215RET6 Datasheet PDF : 173 Pages
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Electrical characteristics
STM32F21xxx
PC Card/CompactFlash controller waveforms and timings
Figure 61 through Figure 66 represent synchronous waveforms together with Table 77 and
Table 78 provides the corresponding timings. The results shown in this table are obtained
with the following FSMC configuration:
COM.FSMC_SetupTime = 0x04;
COM.FSMC_WaitSetupTime = 0x07;
COM.FSMC_HoldSetupTime = 0x04;
COM.FSMC_HiZSetupTime = 0x00;
ATT.FSMC_SetupTime = 0x04;
ATT.FSMC_WaitSetupTime = 0x07;
ATT.FSMC_HoldSetupTime = 0x04;
ATT.FSMC_HiZSetupTime = 0x00;
IO.FSMC_SetupTime = 0x04;
IO.FSMC_WaitSetupTime = 0x07;
IO.FSMC_HoldSetupTime = 0x04;
IO.FSMC_HiZSetupTime = 0x00;
TCLRSetupTime = 0;
TARSetupTime = 0;
In all timing tables, the THCLK is the HCLK clock period.
Figure 61. PC Card/CompactFlash controller waveforms for common memory read
access
FSMC_NCE4_2(1)
FSMC_NCE4_1
FSMC_A[10:0]
FSMC_NREG
FSMC_NIOWR
FSMC_NIORD
tv(NCEx-A)
td(NREG-NCEx)
td(NIORD-NCEx)
th(NCEx-AI)
th(NCEx-NREG)
th(NCEx-NIORD)
th(NCEx-NIOWR)
FSMC_NWE
td(NCE4_1-NOE)
FSMC_NOE
FSMC_D[15:0]
tw(NOE)
tsu(D-NOE)
1. FSMC_NCE4_2 remains high (inactive during 8-bit access.
th(NOE-D)
ai14895b
132/173
Doc ID 17050 Rev 8

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