STM32F21xxx
Electrical characteristics
5.3.5
Embedded reset and power control block characteristics
The parameters given in Table 16 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 11.
Table 16. Embedded reset and power control block characteristics
Symbol
Parameter
Conditions
Min Typ Max Unit
VPVD
VPVDhyst(2)
VPOR/PDR
VPDRhyst(2)
PLS[2:0]=000 (rising
edge)
PLS[2:0]=000 (falling
edge)
PLS[2:0]=001 (rising
edge)
PLS[2:0]=001 (falling
edge)
PLS[2:0]=010 (rising
edge)
PLS[2:0]=010 (falling
edge)
PLS[2:0]=011 (rising
edge)
Programmable voltage
detector level selection
PLS[2:0]=011 (falling
edge)
PLS[2:0]=100 (rising
edge)
PLS[2:0]=100 (falling
edge)
PLS[2:0]=101 (rising
edge)
PLS[2:0]=101 (falling
edge)
PLS[2:0]=110 (rising
edge)
PLS[2:0]=110 (falling
edge)
PLS[2:0]=111 (rising
edge)
PLS[2:0]=111 (falling
edge)
PVD hysteresis
Power-on/power-down Falling edge
reset threshold
Rising edge
PDR hysteresis
2.09 2.14 2.19 V
1.98 2.04 2.08 V
2.23 2.30 2.37 V
2.13 2.19 2.25 V
2.39 2.45 2.51 V
2.29 2.35 2.39 V
2.54 2.60 2.65 V
2.44 2.51 2.56 V
2.70 2.76 2.82 V
2.59 2.66 2.71 V
2.86 2.93 2.99 V
2.65 2.84 3.02 V
2.96 3.03 3.10 V
2.85 2.93 2.99 V
3.07 3.14 3.21 V
2.95 3.03 3.09 V
- 100 - mV
1.60(1) 1.68 1.76 V
1.64 1.72 1.80 V
-
40 - mV
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