CY8CPLC20-OCD(2009) View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

CY8CPLC20-OCD
(Rev.:2009)

Powerline Communication Solution

Cypress Semiconductor 

CY8CPLC20

9.4.3 AC Operational Amplifier Specifications

Table 9-15 lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C

≤ TA ≤ 85°C. Typical parameters apply to 5V at 25°C and are for design guidance only.

Settling times, slew rates, and gain bandwidth are based on the Analog Continuous Time PSoC block.

Table 9-15. 5V AC Operational Amplifier Specifications

Symbol

Description

Min Typ Max Units

TROA

Rising Settling Time to 0.1% for a 1V Step

(10 pF load, Unity Gain)

Power = Low, Opamp Bias = Low

Power = Medium, Opamp Bias = High

Power = High, Opamp Bias = High

–

–

3.9

μs

–

–

0.72

μs

–

–

0.62

μs

TSOA

Falling Settling Time to 0.1% for a 1V Step

(10 pF load, Unity Gain)

Power = Low, Opamp Bias = Low

Power = Medium, Opamp Bias = High

Power = High, Opamp Bias = High

–

–

5.9

μs

–

–

0.92

μs

–

–

0.72

μs

SRROA Rising Slew Rate (20% to 80%) of a 1V Step

(10 pF load, Unity Gain)

Power = Low, Opamp Bias = Low

0.15

–

Power = Medium, Opamp Bias = High

1.7

–

Power = High, Opamp Bias = High

6.5

–

–

V/μs

–

V/μs

–

V/μs

SRFOA Falling Slew Rate (20% to 80%) of a 1V Step

(10 pF load, Unity Gain)

Power = Low, Opamp Bias = Low

0.01

–

Power = Medium, Opamp Bias = High

0.5

–

Power = High, Opamp Bias = High

4.0

–

–

V/μs

–

V/μs

–

V/μs

BWOA

Gain Bandwidth Product

Power = Low, Opamp Bias = Low

Power = Medium, Opamp Bias = High

Power = High, Opamp Bias = High

0.75

–

3.1

–

5.4

–

–

MHz

–

MHz

–

MHz

ENOA

Noise at 1 kHz (Power = Medium, Opamp Bias –

100

– nV/rt-Hz

= High)

Notes

When bypassed by a capacitor on P2[4], the noise of the analog ground signal distributed to each block is reduced by a factor of up

to 5 (14 dB). This is at frequencies above the corner frequency defined by the on-chip 8.1k resistance and the external capacitor.

Figure 9-7. Typical AGND Noise with P2[4] Bypass

dBV/rtHz

10000

0

0.01

0.1

1.0

10

1000

100

0.001

0.01

Document Number: 001-48325 Rev. *E

0.1 Freq (kHz) 1

10

100

Page 31 of 44

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