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ST7PLITE35F2M6TR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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ST7PLITE35F2M6TR Datasheet PDF : 173 Pages
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ST7LITE3xF2
LINSCISERIAL COMMUNICATION INTERFACE (SCI Mode) (cont’d)
EXTENDED RECEIVE PRESCALER DIVISION EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (SCIERPR)
REGISTER (SCIETPR)
Read/Write
Read/Write
Reset Value: 0000 0000 (00h)
Reset Value:0000 0000 (00h)
7
0
ERPR ERPR ERPR ERPR ERPR ERPR ERPR ERPR
7
6
5
4
3
2
1
0
7
0
ETPR ETPR ETPR ETPR ETPR ETPR ETPR ETPR
7
6
5
4
3
2
1
0
Bits 7:0 = ERPR[7:0] 8-bit Extended Receive
Prescaler Register
The extended Baud Rate Generator is activated
when a value other than 00h is stored in this regis-
ter. The clock frequency from the 16 divider (see
Figure 57) is divided by the binary factor set in the
SCIERPR register (in the range 1 to 255).
The extended baud rate generator is not active af-
ter a reset.
Bits 7:0 = ETPR[7:0] 8-bit Extended Transmit
Prescaler Register
The extended Baud Rate Generator is activated
when a value other than 00h is stored in this regis-
ter. The clock frequency from the 16 divider (see
Figure 57) is divided by the binary factor set in the
SCIETPR register (in the range 1 to 255).
The extended baud rate generator is not active af-
ter a reset.
Note: In LIN slave mode, the Conventional and
Extended Baud Rate Generators are disabled.
104/173

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