ST7LITE3xF2
I/O PORTS (Cont’d)
Table 10. I/O Configurations
PAD
VDD
RPU
Hardware Configuration
NOTE 3
DR REGISTER ACCESS
PULL-UP
CONDITION
DR
W
REGISTER
R
DATA BUS
FROM
OTHER
PINS
ALTERNATE INPUT
To on-chip peripheral
EXTERNAL INTERRUPT
SOURCE (eix)
INTERRUPT COMBINATIONAL POLARITY
CONDITION
LOGIC SELECTION
ANALOG INPUT
PAD
VDD
NOTE 3
RPU
DR REGISTER ACCESS
DR
R/W
REGISTER
DATA BUS
PAD
NOTE 3
VDD
RPU
DR REGISTER ACCESS
DR
R/W
REGISTER
DATA BUS
ALTERNATE
ENABLE
BIT
ALTERNATE
OUTPUT
From on-chip peripheral
Notes:
1. When the I/O port is in input configuration and the associated alternate function is enabled as an output,
reading the DR register will read the alternate function output status.
2. When the I/O port is in output configuration and the associated alternate function is enabled as an input,
the alternate function reads the pin status given by the DR register content.
3. For true open drain, these elements are not implemented.
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