FBFM2112F897CSLJLS View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

FBFM2112F897CSLJLS

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip

Intel 

Intel® FM2112 24-Port 10G/1G Ethernet Switch Chip Data Sheet

Note:

2. In 1 lane mode the Autoneg Receive, UD, DU and LU bits are based on only the 1

active lane (could be lane 0 - default or lane 3 if lanes are reversed

Table 151. PCS_IM [1..24]

Name

Interrupt Mask

Bit

14:0

Description

1 – Mask interrupt

0 – Do not mask interrupt

Type

RW

Default

X7FFF

RSVD

Note that bits 0, 1 and 13 correspond to

status bits in the PCS_IP register and shall

remain masked.

31:15

Reserved. Set to 0.

RV

0

Table 152. PACING_PRI_WM [0..7] [1..24]

Name

Pace_WM[i]

Bit

24:0

Description

Type

Watermark (in 4 byte words). For a frame of RW

IEEE 802.1p, the WM is checked against the

IFGS. If the IFGS has exceeded this WM,

then the frame is held on transmission until

the IFGS has been decremented to this WM.*

Default

x0000

RSVD

In 1 lane mode will increment counter by 4B

for each cycle actual data is sent. One can

think of the counter to be an effectively 23b

byte counter. 1 lane 1/10 and 1/100 mode

operation will be ignored and will make IFGS

ineffective for these 2 modes.

31:25

Reserved. Set to 0.

RV

0

At the link level, frames can no longer be re-ordered. So if the scheduler picks a frame

to transmit that can't go because of the IFGS and the frame priority, it is not acceptable

for a higher priority frame behind it to be transmitted first even if it meets the

watermark check in EPL_PACE_PRI_WM[i].

The index used [0..7] is retrieved from the switch priority to egress priority table

TXPRI_MAP regardless if the priority regeneration is enabled or not.

Table 153. PACING_RATE [1..24]

Name

Pacing Rate

RSVD

Bit

7:0

31:8

Description

Type

Pacing Rate controls the rate to a degree of 1 RW

in 256.

0x00 – Pacing is not enabled

0x01 – Pacing is 1/256 the bandwidth.

…

0xFF – Pacing is 255/256 the bandwidth

Reserved. Set to 0.

RV

Default

x00

0

Table 154. PACING_STAT [1..24]

IFGS

Name

RSVD

Bit

24:0

31:25

Description

IFGS (calculated in bytes) from each frame

accumulated from frame to frame.

Reserved. Set to 0.

Type

RO

RV

Default

x0000

0

131

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