LFSC3GA25E-5FN900I View Datasheet(PDF) - Lattice Semiconductor

Part Name

Description

Manufacturer

LFSC3GA25E-5FN900I

LatticeSC/M Family Data Sheet Introduction

Lattice Semiconductor 

Lattice Semiconductor

Revision History

LatticeSC/M Family Data Sheet

Date

June 2006

(cont.)

August 2006

Version

01.2

(cont.)

01.3

Section

Change Summary

DC and Switching Updated Typical Building Block Performance with ispLEVER 6.0 values.

Characteristics (cont.)

Updated LatticeSC External Switching Characteristics with ispLEVER

6.0 values.

Updated Lattice SC Internal Timing Parameters with ispLEVER 6.0 val-

ues.

Updated Lattice SC Family Timing Adders with ispLEVER 6.0 values

Changed % spread from 1 to 0.5 min and from 3 to 1.5 max.

Changed conditions to refer to “with multiplication” and “without multipli-

cation”.

Changed the formula for tOPJIT with multiplication (same result, different

representation).

Pinout Information Expanded definition of NC.

Expanded definition of GND.

Expanded definition of VTT_x.

Expanded definition of VCC12.

Added accuracy of TEMP pin.

Added RESPN_[ULC/URC].

Updated Pin Information Summary with additional devices and pack-

ages.

Added additional devices and packages pinouts.

Removed Power Supply and NC connections table

Removed VTT table

Removed LFSC25 Logic Signal Connections: 900-Ball ffBGA1 table

Changed all VDDP, VDDTX and VDDRX to VCC12.

Ordering Information Added dual marking.

Added lead free packaging information to part number description.

Introduction

Added SC40 1152 information to Table 1-1.

Updated Table 1-3 with ispLEVER 6.0 SP1 results.

Architecture

Added SSTL18 II to Table 2-8.

Changed Table 2-10 VCCIO column to “N/A” for LVDS, mini-LVDS,

BLVDS25, MLVDS25, HYPT and RSDS.

Changed Hypertransport performance to 700 MHz (1400 Mbps) in

Table 2-11.

Changed SPI4.2 performance to 500 MHz (1000 Mbps) in Table 2-11

Added “On packages that include PROBE_GND, the most accurate

measurements will occur between the TEMP pin and the PROBE_GND

pin. On packages that do not include PROBE_GND, measurements

should be made between the TEMP pin and board ground.”

Added VCCIO of 2.5 V for LVPECL33 in table 2-9.

DC and Switching Updated Typical Building Block Performance with ispLEVER 6.0 SP1

Characteristics results.

Updated Initialization and Standby Supply Current table to break out

ICC and ICC12.

Updated LatticeSC External Switching Characteristics with ispLEVER

6.0 SP1 results.

Updated LatticeSC Internal Timing Parameters with ispLEVER 6.0 SP1

results.

7-2

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