Lattice Semiconductor
DC and Switching Characteristics
LatticeSC/M Family Data Sheet
PURESPEED I/O Single-Ended DC Electrical Characteristics
Over Recommended Operating Conditions
Input/Output
VIL
Standard Min. (V) Max. (V)
VIH
VOL Max.
Min. (V) Max. (V) (V)
VOH Min.
(V)
IOL
(mA)
IOH
(mA)
LVCMOS 33
-0.3
0.8
2
3.465
0.4
2.4
24, 16, 8 -24, -16, -8
0.2 VCCIO - 0.2
0.1
-0.1
LVTTL
-0.3
0.8
2
3.465
0.4
2.4
24, 16, 8 -24, -16, -8
0.2 VCCIO - 0.2
0.1
-0.1
LVCMOS 25
-0.3
0.7
1.7
2.65
0.4 VCCIO - 0.4 16, 12, 8, 4 -16, -12, -8, -4
0.2 VCCIO - 0.2
0.1
-0.1
LVCMOS 18
-0.3 0.35VCCIO 0.65VCCIO 2.65
0.4 VCCIO - 0.4 16, 12, 8, 4 -16, -12, -8, -4
0.2 VCCIO - 0.2
0.1
-0.1
LVCMOS 15
-0.3 0.35VCCIO 0.65VCCIO 2.65
0.4 VCCIO - 0.4 16, 12, 8, 4 -16, -12, -8, -4
0.2 VCCIO - 0.2
0.1
-0.1
LVCMOS 12
-0.3 0.35VCCIO 0.65VCCIO 2.65
0.3 VCCIO - 0.3 12, 8, 4, 2 -12, -8, -4, -2
0.2 VCCIO - 0.2
0.1
-0.1
PCIX15
-0.3 0.3VCCIO 0.5VCCIO
1.5 0.1VCCIO 0.9VCCIO
1.5
-0.5
PCI33
-0.3 0.3VCCIO 0.5VCCIO 3.465 0.1VCCIO 0.9VCCIO
1.5
-0.5
PCIX33
-0.3 0.35VCCIO 0.5VCCIO 3.465 0.1VCCIO 0.9VCCIO
1.5
-0.5
AGP-1X, AGP-2X -0.3 0.3VCCIO 0.5VCCIO 3.465 0.1VCCIO 0.9VCCIO
1.5
-0.5
SSTL3_I
-0.3 VREF - 0.2 VREF + 0.2 3.465
0.7 VCCIO - 1.1
8
-8
SSTS3_I OST2
-0.3 VREF - 0.2 VREF + 0.2 3.465
0.9 VCCIO - 1.3
8
-8
SSTL3_II
-0.3 VREF - 0.2 VREF + 0.2 3.465
0.5 VCCIO - 0.9
16
-16
SSTL3_II OST2
-0.3 VREF - 0.2 VREF + 0.2 3.465
0.9 VCCIO - 0.13
16
-16
SSTL2_I
-0.3 VREF - 0.18 VREF + 0.18 2.65
0.54 VCCIO - 0.62 7.6
-7.6
SSTL2_I OST2
-0.3 VREF - 0.18 VREF + 0.18 2.65
0.73 VCCIO - 0.81 7.6
-7.6
SSTL2_II
-0.3 VREF - 0.18 VREF + 0.18 2.65
0.35 VCCIO - 0.43 15.2
-15.2
SSTL2_II OST2
-0.3 VREF - 0.18 VREF + 0.18 2.65
0.73 VCCIO - 0.81 15.2
-15.2
SSTL18_I
-0.3 VREF - 0.125 VREF + 0.125 2.65
0.28 VCCIO - 0.28 13.4
-13.4
SSTL18_II
-0.3 VREF - 0.125 VREF + 0.125 2.65
0.28 VCCIO - 0.28 13.4
-13.4
HSTL15_I
-0.3 VREF - 0.1 VREF + 0.1 2.65
0.4 VCCIO - 0.4
8
-8
HSTL15_II
-0.3 VREF - 0.1 VREF + 0.1 2.65
0.4 VCCIO - 0.4
16
-16
HSTL15_III1
-0.3 VREF - 0.1 VREF + 0.1 2.65
N/A
N/A
N/A
N/A
HSTL15_IV1
-0.3 VREF - 0.1 VREF + 0.1 2.65
N/A
N/A
N/A
N/A
HSTL18_I
-0.3 VREF - 0.1 VREF + 0.1 2.65
0.4 VCCIO - 0.4
9.6
-9.6
HSTL18_II
-0.3 VREF - 0.1 VREF + 0.1 2.65
0.4 VCCIO - 0.4 19.2
-19.2
HSTL18_III1
-0.3 VREF - 0.1 VREF + 0.1 2.65
N/A
N/A
N/A
N/A
HSTL18_IV1
-0.3 VREF - 0.1 VREF + 0.1 2.65
N/A
N/A
N/A
N/A
GTL121,
GTLPLUS151
-0.3 VREF - 0.2 VREF + 0.2 N/A
N/A
N/A
N/A
N/A
1. Input only.
2. Input with on-chip series termination.
3-5