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LTM4620 View Datasheet(PDF) - Linear Technology

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LTM4620 Datasheet PDF : 40 Pages
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LTM4620
APPLICATIONS INFORMATION
current source. This plot would extend to the left back to
1.2V at –273°C Kelvin. This curve is stop at –55°C due to
the test system limits.
If we take the IS equation and substitute into the VD equa-
tion, then we get:
VD
=
VG0
–
Kt
 q
ln
 I0 
 ID
,
VT
=
kT
 q
The expression shows that the junction voltage of the PNP
connected diode decreases linearly if Io were constant
from a value VG0 of 1.2V at absolute zero to a decreasing
value with increased temperature.
If we take this equation and differentiate it with respect to
temperature T, then:
dVD
dT
=
–
(
VG0
–
VD)
/
T
This dVD
dT
change as a function of temperature is the typical ~–2mV/°C.
This equation is simplified for the first order derivation.
Solving for T, T = –(VG0 – VD)/ dVD provide the temperature.
1st Example: Figure 4 for 27°C, or 300°C Kelvin the diode
voltage is 0.598V, thus, 300°C = –(1200mv – 598mv)/
–2mv/°C)
2nd Example: Figure 4 for 75°C, or 350°C Kelvin the di-
ode voltage is 0.50V, thus, 350°C = –(1200mv – 500mv)/
–2mv/°C)
Converting the Kelvin scale to Celsius is simply taking the
Kelvin temp and subtracting –273°C Kelvin from it.
A typical forward voltage is measured and placed in the
electrical characteristics section of the data sheet, and
Figure 8 is the plot of this forward voltage. Measure this
forward voltage at 27°C to establish a reference point.
Then use the above expression while measuring the
forward voltage over temperature will provide a general
temperature monitor.
0.8
ID = 100µA
0.7
0.6
0.5
0.4
0.3
–50 –25
0 25 50 75 100 125
TEMPERATURE (°C)
4620 F08
Figure 8. Diode Voltage VD vs Temperature
T(°C) for Different Bias Currents
The diode connected PNP transistor can be pulled up to
VIN with a resistor to set the current to 100µA for using
this diode connected transistor as a general temperature
monitor by monitoring the diode voltage drop with tem-
perature. See Figure 24 for an example.
Thermal Considerations and Output Current Derating
The thermal resistances reported in the Pin Configura-
tion section of the data sheet are consistent with those
parameters defined by JESD 51-12 and are intended for
use with finite element analysis (FEA) software modeling
tools that leverage the outcome of thermal modeling,
simulation, and correlation to hardware evaluation per-
formed on a µModule package mounted to a hardware
test board defined by JESD 51-9 (ā€œTest Boards for Area
Array Surface Mount Package Thermal Measurementsā€).
The motivation for providing these thermal coefficients is
found in JESD 51-12 (ā€œGuidelines for Reporting and Using
Electronic Package Thermal Informationā€).
For more information www.linear.com/LTM4620
4620fb
21

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