STM32F051x4 STM32F051x6 STM32F051x8
Electrical characteristics
Table 25. Typical and maximum current consumption from VDD at 3.6 V (continued)
All peripherals enabled
All peripherals disabled
Symbol Parameter Conditions fHCLK
Max @ TA(1)
Max @ TA(1)
Unit
Typ
Typ
25 °C 85 °C 105 °C
25 °C 85 °C 105 °C
HSE
48 MHz 14.0 15.3(2) 15.3 16.0(2) 2.8 3.0(2) 3.0
bypass, 32 MHz 9.5 10.2 10.2 10.7 2.0 2.1 2.1
PLL on 24 MHz 7.3 7.8
7.8
8.3 1.5 1.7 1.7
3.2(2)
2.3
1.9
HSE
8 MHz 2.6 2.9 2.9
3.0 0.6 0.8 0.8
Supply
bypass,
IDD
current in
Sleep
PLL off 1 MHz 0.4 0.6
0.6
0.6 0.2 0.4 0.4
mode
48 MHz 14.0 15.3 15.3 16.0 3.8 4.0 4.1
HSI clock,
PLL on
32 MHz
9.5
10.2
10.2
10.7
2.6 2.7
2.8
24 MHz 7.3 7.8 7.8
8.3 2.0 2.1 2.1
0.8
0.4 mA
4.2
2.8
2.1
HSI clock,
PLL off
8 MHz
2.6
2.9
2.9
3.0 0.6 0.8 0.8
0.8
1. Data based on characterization results, not tested in production unless otherwise specified.
2. Data based on characterization results and tested in production (using one common test limit for sum of IDD and IDDA).
Table 26. Typical and maximum current consumption from the VDDA supply
VDDA = 2.4 V
VDDA = 3.6 V
Symbol
Parameter
Conditions
(1)
fHCLK
Max @ TA(2)
Max @ TA(2)
Unit
Typ
Typ
25 °C 85 °C 105 °C
25 °C 85 °C 105 °C
HSE
48 MHz 150 170(3) 178 182(3) 164 183(3) 195 198(3)
bypass, 32 MHz 104 121 126 128 113 129 135 138
Supply
current in
PLL on 24 MHz 82
96
100 103 88 102 106 108
Run or
HSE
8 MHz 2.0 2.7 3.1 3.3 3.5 3.8 4.1 4.4
Sleep
bypass,
IDDA
mode,
code
PLL off 1 MHz 2.0 2.7
3.1
3.3 3.5 3.8
4.1
4.4 µA
executing
48 MHz 220 240 248 252 244 263 275 278
from Flash
memory or
HSI clock,
PLL on
32 MHz
174
191
196
198 193 209
215
218
RAM
24 MHz 152 167 173 174 168 183 190 192
HSI clock,
PLL off
8 MHz
72
79
82
83 83.5 91
94
95
1.
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clock frequencies.
are enabled or disabled, being
is off, IDDA is independent of
2. Data based on characterization results, not tested in production unless otherwise specified.
3. Data based on characterization results and tested in production (using one common test limit for sum of IDD and IDDA).
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