48.3
Power Consumption
Typical power consumption of PLLs, Slow Clock and Main Oscillator
Power consumption of power supply in four different modes: Active, Idle, Ultra Low-power and Backup
Power consumption by peripheral: calculated as the difference in current measurement after having enabled
then disabled the corresponding clock
48.3.1 Power Consumption versus Modes
The values in Table 48-3 and Table 48-4 on page 1216 are estimated values of the power consumption with
operating conditions as follows:
VDDIOM0 = 1.8V
VDDIOP0 and 1 = 3.3V
VDDPLLA = 1.0V
VDDCORE = 1.0V
VDDBU = 3.3V
TA = 25°C
There is no consumption on the I/Os of the device.
Figure 48-1. Measures Schematics
VDDBU
AMP1
VDDCORE
AMP2
These figures represent the power consumption estimated on the power supplies.
Table 48-3. Power Consumption for Different Modes
Mode
Conditions
Active
ARM Core clock is 400 MHz.
MCK is 133 MHz.
All peripheral clocks activated.
onto AMP2
Idle state, waiting an interrupt.
Idle
All peripheral clocks de-activated.
onto AMP2
Ultra low power
ARM Core clock is 500 Hz.
All peripheral clocks de-activated.
onto AMP2
Backup
Device only VDDBU powered
onto AMP1
Consumption
Unit
130
mA
55
mA
30
mA
8
µA
SAM9G46 Series [DATASHEET]
Atmel-11028G-ATARM-SAM9G46-Datasheet_08-Dec-15
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