AT91SAM7S64C-AU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

AT91SAM7S64C-AU

AT91SAM ARM-based Flash MCU

Atmel Corporation 

26.5.1 Debug Unit Control Register

Name:

DBGU_CR

Access Type:

Write-only

31

30

29

–

–

–

23

22

21

–

–

–

15

14

13

–

–

–

7

TXDIS

6

TXEN

5

RXDIS

28

–

20

–

12

–

4

RXEN

27

–

19

–

11

–

3

RSTTX

26

–

18

–

10

–

2

RSTRX

25

24

–

–

17

16

–

–

9

8

–

RSTSTA

1

0

–

–

• RSTRX: Reset Receiver

0 = No effect.

1 = The receiver logic is reset and disabled. If a character is being received, the reception is aborted.

• RSTTX: Reset Transmitter

0 = No effect.

1 = The transmitter logic is reset and disabled. If a character is being transmitted, the transmission is aborted.

• RXEN: Receiver Enable

0 = No effect.

1 = The receiver is enabled if RXDIS is 0.

• RXDIS: Receiver Disable

0 = No effect.

1 = The receiver is disabled. If a character is being processed and RSTRX is not set, the character is completed before the

receiver is stopped.

• TXEN: Transmitter Enable

0 = No effect.

1 = The transmitter is enabled if TXDIS is 0.

• TXDIS: Transmitter Disable

0 = No effect.

1 = The transmitter is disabled. If a character is being processed and a character has been written the DBGU_THR and

RSTTX is not set, both characters are completed before the transmitter is stopped.

• RSTSTA: Reset Status Bits

0 = No effect.

1 = Resets the status bits PARE, FRAME and OVRE in the DBGU_SR.

SAM7S Series [DATASHEET]

6175M–ATARM–26-Oct-12

225

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