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ATMEGA8515-16JI(2010) View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
ATMEGA8515-16JI
(Rev.:2010)
Atmel
Atmel Corporation 
ATMEGA8515-16JI Datasheet PDF : 257 Pages
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Parallel Programming
Parameters, Pin
Mapping, and
Commands
Signal Names
This section describes how to parallel program and verify Flash Program memory,
EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega8515. Pulses
are assumed to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATmega8515 are referenced by signal names describ-
ing their functionality during parallel programming, see Figure 75 and Table 85. Pins not
described in the following table are referenced by pin names.
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-
tive pulse. The bit coding is shown in Table 87.
When pulsing WR or OE, the command loaded determines the action executed. The dif-
ferent Commands are shown in Table 88.
Figure 75. Parallel Programming
RDY/BSY
OE
WR
BS1
XA0
XA1
PAGEL
+12 V
BS2
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
PA0
XTAL1
GND
VCC
PB7 - PB0
+5V
DATA
Table 85. Pin Name Mapping
Signal Name in Programming Mode Pin Name I/O Function
RDY/BSY
PD1
O
0: Device is busy programming, 1:
Device is ready for new command
OE
PD2
I Output Enable (Active low)
WR
PD3
I Write Pulse (Active low)
BS1
PD4
I
Byte Select 1 (“0” selects low
byte, “1” selects high byte)
XA0
PD5
I XTAL Action Bit 0
XA1
PD6
I XTAL Action Bit 1
PAGEL
PD7
I
Program memory and EEPROM
data Page Load
BS2
PA0
I
Byte Select 2 (“0” selects low
byte, “1” selects 2’nd high byte)
DATA
PB7-0
I/O
Bi-directional Data bus (Output
when OE is low)
182 ATmega8515(L)
2512K–AVR–01/10

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