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STM8S003K3(2012) View Datasheet(PDF) - STMicroelectronics

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Description
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STM8S003K3 Datasheet PDF : 100 Pages
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STM8S003K3 STM8S003F3
Electrical characteristics
(1) Parameters are given by selecting 10 MHz I/O output frequency.
(2) Data characterization in progress.
(3) Values based on design simulation and/or characterization results, and not tested in
production.
(4) Min time is for the minimum time to drive the output and the max time is for the maximum
time to validate the data.
(5) Min time is for the minimum time to invalidate the output and the max time is for the
maximum time to put the data in Hi-Z.
Figure 38: SPI timing diagram - slave mode and CPHA = 0
NSS input
tSU(NSS)
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tw(SCKH)
tw(SCKL)
ta(SO)
MISO
OUT P UT
tsu(SI)
MOSI
I NPUT
tc(SCK)
tv(SO)
MS B O UT
M SB IN
th(SI)
th(SO)
BI T6 OUT
B I T1 IN
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14134
Figure 39: SPI timing diagram - slave mode and CPHA = 1
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCKH)
tw(SCKL)
MISO
OUT P UT
MOSI
I NPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MS B O UT
th(SI)
M SB IN
th(SO)
BI T6 OUT
B I T1 IN
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14135
1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD.
DocID018576 Rev 3
79/100

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