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STM8S003K3U6CTR View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STM8S003K3U6CTR Datasheet PDF : 103 Pages
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Electrical characteristics
STM8S003F3 STM8S003K3
3. Min time is for the minimum time to invalidate the output and the max time is for the maximum time to put the data in Hi-Z.
Figure 38. SPI timing diagram - slave mode and CPHA = 0
Figure 39. SPI timing diagram - slave mode and CPHA = 1(1)
NSS input
tSU(NSS)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
tw(SCKH)
tw(SCKL)
MISO
OUTPUT
MOSI
INPUT
ta(SO)
tsu(SI)
tc(SCK)
tv(SO)
MSB OUT
th(SI)
MSB IN
th(SO)
BIT6 OUT
BIT 1 IN
1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD.
th(NSS)
tr(SCK)
tf(SCK)
tdis(SO)
LSB OUT
LSB IN
ai14135b
78/103
DS7147 Rev 10

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