STM8S105K4B3(2015) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8S105K4B3
(Rev.:2015)

Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbyte Flash, integrated EEPROM, 10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

STM8S105x4/6

Electrical characteristics

Low power mode wakeup times

Table 28. Wakeup times

Symbol

Parameter

Conditions

tWU(WFI)

Wakeup time from wait

mode to run mode(2)

0 to 16 MHz

tWU(WFI)

Wakeup time from run

mode(2)

fCPU= fMASTER= 16 MHz

tWU(AH)

Wakeup time active halt

mode to run mode(2)

MVR voltage

regulator on(4)

Flash in

operating

mode(5)

HSI (after

wakeup)

tWU(AH)

Wakeup time active halt

mode to run mode(2)

MVR voltage

regulator off(4)

Flash in

operating

mode(5)

HSI (after

wakeup)

tWU(AH)

Wakeup time active halt

mode to run mode(2)

MVR voltage

regulator off(4)

Flash in

operating

mode(5)

HSI (after

wakeup)

tWU(AH)

Wakeup time active halt

mode to run mode(2)

MVR voltage

regulator off(4)

Flash in

power-down

mode(5)

HSI (after

wakeup)

tWU(H)

Wakeup time from halt

mode to run mode(2)

Flash in operating mode(5)

tWU(H)

Wakeup time from halt

mode to run mode(2)

Flash in power-down mode(5)

1. Data based on characterization results, not tested in production.

2. Measured from interrupt event to interrupt vector fetch

3. tWU(WFI) = 2 x 1/fmaster + 67 x 1/fCPU

4. Configured by the REGAH bit in the CLK_ICKR register.

5. Configured by the AHALT bit in the FLASH_CR1 register.

6. Plus 1 LSI clock depending on synchronization.

Typ

Max(1)

Unit

-

See note(3)

0.56

-

1(6)

2(6)

3(6)

48(6)

-

µs

-

50(6)

-

52

-

54

-

Total current consumption and timing in forced reset state

Table 29. Total current consumption and timing in forced reset state

Symbol

Parameter

Conditions

Typ

Max(1)

Unit

IDD(R)

tRESETBL

Supply current in reset

state(2)

Reset pin release to

vector fetch

VDD = 5 V

VDD = 3.3 V

-

500

-

µA

400

-

-

150

µs

1. Data guaranteed by design, not tested in production.

2. Characterized with all I/Os tied to VSS.

Current consumption of on-chip peripherals

Subject to general operating conditions for VDD and TA.

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