STM8S105K6U3C View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM8S105K6U3C

Access line, 16 MHz STM8S 8-bit MCU, up to 32 Kbytes Flash, integrated EEPROM,10-bit ADC, timers, UART, SPI, I²C

STMicroelectronics 

Ordering information

STM8S105xx

AFR4

(check only one option)

AFR5

(check only one option)

AFR6

(check only one option)

AFR7

(check only one option)

[ ] 1: Port D0 alternate function = TIM1_BKIN.

[ ] 0: Remapping option inactive. Default alternate functions used.

Refer to pinout description.

[ ] 1: Port D7 alternate function = TIM1_CH4.

[ ] 0: Remapping option inactive. Default alternate functions used.

Refer to pinout description.

[ ] 1: Port B3 alternate function = TIM1_ETR, port B2 alternate

function = TIM1_NCC3, port B1 alternate function = TIM1_CH2N,

port B0 alternate function = TIM1_CH1N.

[ ] 0: Remapping option inactive. Default alternate functions used.

Refer to pinout description

[ ] 1: Port B5 alternate function = I2C_SDA, port B4 alternate

function = I2C_SCL.

[ ] 0: Remapping option inactive. Default alternate functions used.

Refer to pinout description.

[ ] 1: Port D4 alternate function = BEEP.

OPT3 watchdog

WWDG_HALT

(check only one option)

WWDG_HW

(check only one option)

IWDG_HW

(check only one option)

LSI_EN

(check only one option)

HSITRIM

(check only one option)

[ ] 0: No reset generated on halt if WWDG active.

[ ] 1: Reset generated on halt if WWDG active.

[ ] 0: WWDG activated by software.

[ ] 1: WWDG activated by hardware.

[ ] 0: IWDG activated by software.

[ ] 1: IWDG activated by hardware.

[ ] 0: LSI clock is not available as CPU clock source.

[ ] 1: LSI clock is available as CPU clock source.

[ ] 0: 3-bit trimming supported in CLK_HSITRIMR

register.

[ ] 1: 4-bit trimming supported in CLK_HSITRIMR

register.

OPT4 wakeup

PRSC

(check only one option)

[ ] for 16 MHz to 128 kHz prescaler.

[ ] for 8 MHz to 128 kHz prescaler.

[ ] for 4 MHz to 128 kHz prescaler.

120/127

DocID14771 Rev 9

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