STM8S105xx
Memory and register map
Address Block Register label Register name
0x00
5342
TIM4_SR
TIM4 status register
0x00
5343
TIM4_EGR
TIM4 event generation register
0x00
5344
TIM4_CNTR
TIM4 counter
0x00
5345
TIM4_PSCR
TIM4 prescaler register
0x00
5346
TIM4_ARR
TIM4 auto-reload register
0x00
5347 to
0x00
53DF
Reserved area (153 bytes)
0x00
53E0 to
0x00
53F3
ADC1
ADC _DBxR
ADC data buffer registers
0x00
53F4 to
0x00
53FF
Reserved area (12 bytes)
0x00
5400
ADC1 ADC _CSR
ADC control/ status register
0x00
5401
ADC_CR1
ADC configuration register 1
0x00
5402
ADC_CR2
ADC configuration register 2
0x00
5403
ADC_CR3
ADC configuration register 3
Reset
status
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
DocID14771 Rev 9
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