FIGURE 28-18: I2C BUS START/STOP BITS TIMING
SCL
SDA
SP90
SP91
PIC16(L)F1503
SP92
SP93
Start
Condition
Note: Refer to Figure 28-4 for load conditions.
Stop
Condition
TABLE 28-18: I2C BUS START/STOP BITS REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Param.
No.
Symbol
Characteristic
Min. Typ Max. Units
Conditions
SP90* TSU:STA Start condition
Setup time
100 kHz mode 4700 — — ns Only relevant for Repeated
400 kHz mode 600 — —
Start condition
SP91* THD:STA Start condition
Hold time
100 kHz mode 4000 — — ns After this period, the first
400 kHz mode 600 — —
clock pulse is generated
SP92* TSU:STO Stop condition 100 kHz mode 4700 — — ns
Setup time
400 kHz mode 600 — —
SP93 THD:STO Stop condition 100 kHz mode 4000 — — ns
Hold time
400 kHz mode 600 — —
* These parameters are characterized but not tested.
FIGURE 28-19:
SCL
SDA
In
SDA
Out
I2C BUS DATA TIMING
SP103 SP100
SP101
SP90
SP91
SP106
SP107
SP109
SP109
SP102
SP92
SP110
Note: Refer to Figure 28-4 for load conditions.
2011-2015 Microchip Technology Inc.
DS40001607D-page 291