PIC16(L)F1503
8.3 Register Definitions: Voltage Regulator Control
REGISTER 8-1:
U-0
—
bit 7
VREGCON: VOLTAGE REGULATOR CONTROL REGISTER(1)
U-0
U-0
U-0
U-0
U-0
R/W-0/0
—
—
—
—
—
VREGPM
R/W-1/1
Reserved
bit 0
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7-2
bit 1
bit 0
Unimplemented: Read as ‘0’
VREGPM: Voltage Regulator Power Mode Selection bit
1 = Low-Power Sleep mode enabled in Sleep(2)
Draws lowest current in Sleep, slower wake-up
0 = Normal Power mode enabled in Sleep(2)
Draws higher current in Sleep, faster wake-up
Reserved: Read as ‘1’. Maintain this bit set.
Note 1: PIC16F1503 only.
2: See Section 28.0 “Electrical Specifications”.
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register on
Page
INTCON
GIE
PEIE TMR0IE INTE
IOCIE TMR0IF INTF
IOCIF
64
IOCAF
—
—
IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0
106
IOCAN
—
—
IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0
106
IOCAP
—
—
IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0
106
PIE1
TMR1GIE ADIE
—
—
SSP1IE
—
TMR2IE TMR1IE
65
PIE2
—
C2IE
C1IE
—
BCL1IE NCO1IE
—
—
66
PIE3
—
—
—
—
—
—
CLC2IE CLC1IE
67
PIR1
TMR1GIF ADIF
—
—
SSP1IF
—
TMR2IF TMR1IF
67
PIR2
—
C2IF
C1IF
—
BCL1IF NCO1IF
—
—
67
PIR3
—
—
—
—
—
—
CLC2IF CLC1IF
70
STATUS
—
—
—
TO
PD
Z
DC
C
17
WDTCON —
—
WDTPS<4:0>
SWDTEN
77
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-Down mode.
DS40001607D-page 74
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