PIC32MX150F256HT-I/PT View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC32MX150F256HT-I/PT

32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog

Microchip Technology 

PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY

REGISTER 23-7: C1RXOVF: CAN RECEIVE FIFO OVERFLOW STATUS REGISTER

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Bit

Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1

31:24

23:16

15:8

7:0

U-0

—

U-0

—

R-0

RXOVF15

R-0

RXOVF7

U-0

—

U-0

—

R-0

RXOVF14

R-0

RXOVF6

U-0

—

U-0

—

R-0

RXOVF13

R-0

RXOVF5

U-0

—

U-0

—

R-0

RXOVF12

R-0

RXOVF4

U-0

—

U-0

—

R-0

RXOVF11

R-0

RXOVF3

U-0

—

U-0

—

R-0

RXOVF10

R-0

RXOVF2

U-0

—

U-0

—

R-0

RXOVF9

R-0

RXOVF1

Bit

24/16/8/0

U-0

—

U-0

—

R-0

RXOVF8

R-0

RXOVF0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-16

bit 15-0

Unimplemented: Read as ‘0’

RXOVF<15:0>: FIFOx Receive Overflow Interrupt Pending bit

1 = FIFO has overflowed

0 = FIFO has not overflowed

REGISTER 23-8: C1TMR: CAN TIMER REGISTER

Bit

Range

31:24

23:16

15:8

7:0

Bit

31/23/15/7

R/W-0

R/W-0

R/W-0

R/W-0

Bit

30/22/14/6

R/W-0

Bit

29/21/13/5

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

Bit

Bit

28/20/12/4 27/19/11/3

R/W-0

R/W-0

CANTS<15:8>

R/W-0

R/W-0

CANTS<7:0>

R/W-0

R/W-0

CANTSPRE<15:8>

R/W-0

R/W-0

CANTSPRE<7:0>

Bit

26/18/10/2

R/W-0

R/W-0

R/W-0

R/W-0

Bit

25/17/9/1

R/W-0

R/W-0

R/W-0

R/W-0

Bit

24/16/8/0

R/W-0

R/W-0

R/W-0

R/W-0

Legend:

R = Readable bit

-n = Value at POR

W = Writable bit

‘1’ = Bit is set

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared

x = Bit is unknown

bit 31-0

bit 15-0

CANTS<15:0>: CAN Time Stamp Timer bits

This is a free-running timer that increments every CANTSPRE system clocks when the CANCAP bit

(C1CON<20>) is set.

CANTSPRE<15:0>: CAN Time Stamp Timer Prescaler bits

1111 1111 1111 1111 = CAN time stamp timer (CANTS) increments every 65,535 system clocks

•

•

•

0000 0000 0000 0000 = CAN time stamp timer (CANTS) increments every system clock

Note 1: C1TMR will be paused when CANCAP = 0.

2: The C1TMR prescaler count will be reset on any write to C1TMR (CANTSPRE will be unaffected).

DS60001290E-page 254

 2014-2017 Microchip Technology Inc.

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