DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

PIC32MX170F512L-I/MR View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC32MX170F512L-I/MR Datasheet PDF : 382 Pages
First Prev 281 282 283 284 285 286 287 288 289 290 Next Last
PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 26-1: CTMUCON: CTMU CONTROL REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
31:24
23:16
15:8
7:0
R/W-0
EDG1MOD
R/W-0
EDG2MOD
R/W-0
ON
R/W-0
R/W-0
EDG1POL
R/W-0
EDG2POL
U-0
R/W-0
R/W-0
R/W-0
R/W-0
EDG1SEL<3:0>
R/W-0
R/W-0
R/W-0
EDG2SEL<3:0>
R/W-0
R/W-0
CTMUSIDL TGEN(1)
R/W-0
EDGEN
R/W-0
R/W-0
R/W-0
ITRIM<5:0>
R/W-0
R/W-0
R/W-0
EDGSEQEN
R/W-0
R/W-0
R/W-0
EDG2STAT EDG1STAT
U-0
U-0
R/W-0
IDISSEN(2)
R/W-0
CTTRIG
R/W-0
R/W-0
IRNG<1:0>
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31 EDG1MOD: Edge 1 Edge Sampling Select bit
1 = Input is edge-sensitive
0 = Input is level-sensitive
bit 30 EDG1POL: Edge 1 Polarity Select bit
1 = Edge 1 programmed for a positive edge response
0 = Edge 1 programmed for a negative edge response
bit 29-26 EDG1SEL<3:0>: Edge 1 Source Select bits
1111 = IC4 Capture Event is selected
1110 = C2OUT pin is selected
1101 = C1OUT pin is selected
1100 = IC3 Capture Event is selected
1011 = IC2 Capture Event is selected
1010 = IC1 Capture Event is selected
1001 = CTED8 pin is selected
1000 = CTED7 pin is selected
0111 = CTED6 pin is selected
0110 = CTED5 pin is selected
0101 = CTED4 pin is selected
0100 = CTED3 pin is selected
0011 = CTED1 pin is selected
0010 = CTED2 pin is selected
0001 = OC1 Compare Event is selected
0000 = Timer1 Event is selected
bit 25 EDG2STAT: Edge 2 Status bit
Indicates the status of Edge 2 and can be written to control edge source
1 = Edge 2 has occurred
0 = Edge 2 has not occurred
Note 1:
2:
3:
4:
When this bit is set for Pulse Delay Generation, the EDG2SEL<3:0> bits must be set to ‘1110’ to select
C2OUT.
The ADC module Sample and Hold capacitor is not automatically discharged between sample/conversion
cycles. Software using the ADC as part of a capacitive measurement, must discharge the ADC capacitor
before conducting the measurement. The IDISSEN bit, when set to ‘1’, performs this function. The ADC
module must be sampling while the IDISSEN bit is active to connect the discharge sink to the capacitor
array.
Refer to the CTMU Current Source Specifications (Table 31-41) in Section 31.0 “40 MHz Electrical
Characteristics” for current values.
This bit setting is not available for the CTMU temperature diode.
2014-2017 Microchip Technology Inc.
DS60001290E-page 281

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]