PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 28-1: DEVCFG0: DEVICE CONFIGURATION WORD 0
Bit
Range
31:24
23:16
15:8
7:0
Bit
31/23/15/7
r-0
—
r-1
—
R/P
r-1
—
Bit
30/22/14/6
r-1
—
r-1
—
R/P
r-1
—
Bit
Bit
Bit
29/21/13/5 28/20/12/4 27/19/11/3
r-1
R/P
r-1
—
CP
—
r-1
r-1
R/P
—
—
R/P
R/P
R/P
PWP<5:0>
r-1
R/P
R/P
—
ICESEL<1:0>
Bit
Bit
Bit
26/18/10/2 25/17/9/1 24/16/8/0
r-1
r-1
R/P
—
—
BWP
R/P
R/P
R/P
PWP<9:6>
R/P
r-1
r-1
—
—
R/P
JTAGEN(1)
R/P
R/P
DEBUG<1:0>
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
P = Programmable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31 Reserved: Write ‘0’
bit 30-29 Reserved: Write ‘1’
bit 28 CP: Code-Protect bit
Prevents boot and program Flash memory from being read or modified by an external pro-
gramming device.
1 = Protection is disabled
0 = Protection is enabled
bit 27-25 Reserved: Write ‘1’
bit 24 BWP: Boot Flash Write-Protect bit
Prevents boot Flash memory from being modified during code execution.
1 = Boot Flash is writable
0 = Boot Flash is not writable
bit 23-20 Reserved: Write ‘1’
Note 1: This bit sets the value for the JTAGEN bit in the CFGCON register.
2014-2017 Microchip Technology Inc.
DS60001290E-page 293