PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY
REGISTER 4-5: BMXDRMSZ: DATA RAM SIZE REGISTER
Bit
Bit
Bit
Bit
Bit
Bit
Range 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3
31:24
R
R
R
R
R
BMXDRMSZ<31:24>
R
R
R
R
R
23:16
BMXDRMSZ<23:16>
15:8
R
R
R
R
R
BMXDRMSZ<15:8>
7:0
R
R
R
R
R
BMXDRMSZ<7:0>
Bit
26/18/10/2
R
R
R
R
Bit
25/17/9/1
R
R
R
R
Bit
24/16/8/0
R
R
R
R
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-0
BMXDRMSZ<31:0>: Data RAM Memory (DRM) Size bits
Static value that indicates the size of the Data RAM in bytes:
0x00002000 = Device has 8 KB RAM
0x00004000 = Device has 16 KB RAM
0x00008000 = Device has 32 KB RAM
0x00010000 = Device has 64 KB RAM
REGISTER 4-6: BMXPUPBA: PROGRAM FLASH (PFM) USER PROGRAM BASE ADDRESS
REGISTER
Bit
Range
31:24
23:16
15:8
7:0
Bit
31/23/15/7
U-0
—
U-0
—
R/W-0
R-0
Bit
30/22/14/6
U-0
—
U-0
—
R/W-0
R-0
Bit
29/21/13/5
U-0
—
U-0
—
R/W-0
R-0
Bit
Bit
28/20/12/4 27/19/11/3
U-0
U-0
—
—
U-0
R/W-0
—
R/W-0
R/W-0
BMXPUPBA<15:8>
R-0
R-0
BMXPUPBA<7:0>
Bit
Bit
26/18/10/2 25/17/9/1
U-0
U-0
—
—
R/W-0
R/W-0
BMXPUPBA<19:16>
R-0
R-0
R-0
R-0
Bit
24/16/8/0
U-0
—
R/W-0
R-0
R-0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-20 Unimplemented: Read as ‘0’
bit 19-11 BMXPUPBA<19:11>: Program Flash (PFM) User Program Base Address bits
bit 10-0 BMXPUPBA<10:0>: Read-Only bits
Value is always ‘0’, which forces 2 KB increments
Note 1: At Reset, the value in this register is forced to zero, which causes all of the RAM to be allocated to Kernel
mode data usage.
2: The value in this register must be less than or equal to BMXPFMSZ.
DS60001290E-page 50
2014-2017 Microchip Technology Inc.