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STM8AF52A6TCX View Datasheet(PDF) - STMicroelectronics

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Description
Manufacturer
STM8AF52A6TCX Datasheet PDF : 125 Pages
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Electrical characteristics
STM8AF526x/8x/Ax STM8AF6269/8x/Ax
10.3.10 I2C interface characteristics
Symbol
Table 42. I2C characteristics
Parameter
Standard mode I2C
Min(2)
Max(2)
Fast mode I2C(1)
Min(2) Max(2)
Unit
tw(SCLL)
tw(SCLH)
tsu(SDA)
th(SDA)
tr(SDA)
tr(SCL)
tf(SDA)
tf(SCL)
th(STA)
tsu(STA)
tsu(STO)
tw(STO:STA)
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
(VDD 3 V to 5.5 V)
SDA and SCL fall time
(VDD 3 V to 5.5 V)
START condition hold time
Repeated START condition setup time
STOP condition setup time
STOP to START condition time
(bus free)
4.7
-
1.3
-
µs
4.0
-
0.6
-
250
-
100
-
0(3)
-
0(4)
900(3)
-
1000
-
300
ns
-
300
-
300
4.0
-
0.6
-
µs
4.7
-
0.6
-
4.0
-
0.6
-
µs
4.7
-
1.3
-
µs
Cb
Capacitive load for each bus line
-
400
-
400 pF
1. fMASTER, must be at least 8 MHz to achieve max fast I2C speed (400 kHz)
2. Data based on standard I2C protocol requirement, not tested in production
3. The maximum hold time of the start condition has only to be met if the interface does not stretch the low time
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the undefined region
of the falling edge of SCL
84/125
DocID14395 Rev 15

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