STM32F100R8T6BTR(2010) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F100R8T6BTR
(Rev.:2010)

Low & medium-density value line, advanced ARM-based 32-bit MCU with 16 to 128 KB Flash, 12 timers, ADC, DAC & 8 comm interfaces

STMicroelectronics 

STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB

Electrical characteristics

Table 38. I2C characteristics

Symbol

Parameter

Standard mode I2C(1) Fast mode I2C(1)(2)

Unit

Min

Max

Min

Max

tw(SCLL)

tw(SCLH)

tsu(SDA)

th(SDA)

tr(SDA)

tr(SCL)

tf(SDA)

tf(SCL)

th(STA)

tsu(STA)

SCL clock low time

SCL clock high time

SDA setup time

SDA data hold time

SDA and SCL rise time

SDA and SCL fall time

Start condition hold time

Repeated Start condition setup

time

4.7

1.3

µs

4.0

0.6

250

100

0(3)

0(4)

900(3)

1000

300 ns

300

300

4.0

0.6

µs

4.7

0.6

tsu(STO) Stop condition setup time

4.0

tw(STO:STA)

Stop to Start condition time (bus

free)

4.7

0.6

µs

1.3

µs

Cb

Capacitive load for each bus line

400

400 pF

1. Guaranteed by design, not tested in production.

2.

fPCLK1

4 MHz

must be higher

to achieve fast

than 2 MHz to achieve

mode I2C frequencies.

standard mode I2C frequencies. It

It must be a multiple of 10 MHz to

must

reach

be higher than

the 400 kHz

maximum I2C fast mode clock.

3. The maximum hold time of the Start condition only has to be met if the interface does not stretch the low

period of SCL signal.

4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the

undefined region of the falling edge of SCL.

Doc ID 16455 Rev 2

61/84

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