STM8S207xx, STM8S208xx
Memory and register map
Table 9. General hardware register map (continued)
Address
Block
Register label
Register name
Reset
status
0x00 50CC
0x00 50CD
CLK_HSITRIMR
HSI clock calibration trimming register
0x00
CLK
CLK_SWIMCCR
SWIM clock control register
0bXXXX
XXX0
0x00 50CE to
0x00 50D0
Reserved area (3 bytes)
0x00 50D1
0x00 50D2
WWDG
WWDG_CR
WWDG_WR
WWDG control register
WWDR window register
0x7F
0x7F
0x00 50D3 to
0x00 50DF
0x00 50E0
IWDG_KR
Reserved area (13 bytes)
IWDG key register
0xXX(2)
0x00 50E1
IWDG
IWDG_PR
IWDG prescaler register
0x00
0x00 50E2
IWDG_RLR
IWDG reload register
0xFF
0x00 50E3 to
0x00 50EF
Reserved area (13 bytes)
0x00 50F0
AWU_CSR1
AWU control/status register 1
0x00
0x00 50F1
AWU
AWU_APR
AWU asynchronous prescaler buffer register 0x3F
0x00 50F2
AWU_TBR
AWU timebase selection register
0x00
0x00 50F3
BEEP
BEEP_CSR
BEEP control/status register
0x1F
0x00 50F4 to
0x00 50FF
Reserved area (12 bytes)
0x00 5200
SPI_CR1
SPI control register 1
0x00
0x00 5201
SPI_CR2
SPI control register 2
0x00
0x00 5202
SPI_ICR
SPI interrupt control register
0x00
0x00 5203
SPI_SR
SPI
0x00 5204
SPI_DR
SPI status register
SPI data register
0x02
0x00
0x00 5205
SPI_CRCPR
SPI CRC polynomial register
0x07
0x00 5206
SPI_RXCRCR
SPI Rx CRC register
0xFF
0x00 5207
SPI_TXCRCR
SPI Tx CRC register
0xFF
0x00 5208 to
0x00 520F
0x00 5210
0x00 5211
0x00 5212
0x00 5213
0x00 5214
Reserved area (8 bytes)
I2C_CR1
I2C_CR2
I2C_FREQR
I2C
I2C_OARL
I2C_OARH
I2C control register 1
I2C control register 2
I2C frequency register
I2C own address register low
I2C own address register high
0x00
0x00
0x00
0x00
0x00
0x00 5215
Reserved
Doc ID 14733 Rev 12
37/103