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STM8S207S8T3C View Datasheet(PDF) - STMicroelectronics

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STM8S207S8T3C Datasheet PDF : 103 Pages
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STM8S207xx, STM8S208xx
Electrical characteristics
10.3.6 I/O port pin characteristics
General characteristics
Subject to general operating conditions for VDD and TA unless otherwise specified. All
unused pins must be kept at a fixed voltage: using the output mode of the I/O for example or
an external pull-up or pull-down resistor.
Table 37. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level
voltage
VIH
Input high level
voltage
Vhys Hysteresis(1)
Rpu Pull-up resistor
VDD = 5 V
VDD = 5 V, VIN = VSS
Fast I/Os
Load = 50 pF
-0.3
0.7 x VDD
0.3 x VDD
V
VDD + 0.3 V
700
mV
30
55
80
kΩ
20 (2)
tR, tF
Rise and fall time
(10% - 90%)
Standard and high sink I/Os
Load = 50 pF
Fast I/Os
Load = 20 pF
125 (2)
ns
35(3)
Standard and high sink I/Os
Load = 20 pF
125(3)
Input leakage
Ilkg current,
analog and digital
Ilkg ana
Analog input
leakage current
VSS ≤ VIN ≤ VDD
VSS ≤ VIN ≤ VDD
±1
µA
±250 (2)
nA
Ilkg(inj)
Leakage current in
adjacent I/O(2)
Injection current ±4 mA
±1(2)
µA
1. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.
2. Data based on characterization results, not tested in production.
3. Guaranteed by design.
Doc ID 14733 Rev 12
69/103

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