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STM8S208RB View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STM8S208RB Datasheet PDF : 103 Pages
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STM8S207xx, STM8S208xx
Figure 39. SPI timing diagram - master mode(1)
High
NSS input
CPHA= 0
CPOL=0
CPHA= 0
CPOL=1
tc(SCK)
CPHA=1
CPOL=0
CPHA=1
CPOL=1
MISO
INP UT
tsu(MI)
MOSI
OUTU T
tw(SCKH)
tw(SCKL)
MS BIN
th(MI)
M SB OUT
tv(MO)
BI T6 IN
B I T1 OUT
th(MO)
1. Measurement points are done at CMOS levels: 0.3 VDD and 0.7 VDD.
Electrical characteristics
tr(SCK)
tf(SCK)
LSB IN
LSB OUT
ai14136
Doc ID 14733 Rev 12
79/103

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