AR1010T-I/ML(2016) View Datasheet(PDF) - Microchip Technology
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Description
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AR1010T-I/ML Datasheet PDF : 61 Pages
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AR1000 SERIES RESISTIVE TOUCH SCREEN CONTROLLER
4.0 I2C COMMUNICATIONS
The AR1021 is an I2C slave device with a 7-bit address
of 0x4D, supporting up to 400 kHz bit rate.
A master (host) device interfaces with the AR1021.
4.1 I2C Hardware Interface
A summary of the hardware interface pins is shown
below in Table 4-1.
TABLE 4-1: I2C HARDWARE INTERFACE
AR1021 Pin
M1
SCL
SDA
SDO
Description
Connect to VSS to select I2C communications
Serial Clock
Serial Data
Data ready interrupt output to master
M1 Pin
• The M1 pin must be connected to VSS to
configure the AR1021 for I2C communications.
SCL Pin
• The SCL (Serial Clock) pin is electrically
open-drain and requires a pull-up resistor,
typically 2.2 K to 10 K, from SCL to VDD.
• SCL Idle state is high.
SDA Pin
• The SDA (Serial Data) pin is electrically
open-drain and requires a pull-up resistor,
typically 2.2 K to 10 K, from SDA to VDD.
• SDA Idle state is high.
• Master write data is latched in on SCL rising
edges.
• Master read data is latched out on SCL falling
edges to ensure it is valid during the subsequent
SCL high time.
SDO Pin
• The SDO pin is a driven output interrupt to the
master.
• SDO Idle state is low.
• SDO will be asserted high when the AR1021 has
data ready (touch report or command response)
for the master to read.
DS40001393C-page 14
2009-2016 Microchip Technology Inc.
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