MCP795W22T-I/SL View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

MCP795W22T-I/SL

2Kb EE 64B SRAM WD TED ID

Microchip Technology 

MCP795W1X/MCP795W2X

In the case where the MSB of the Calibration register

is set to ‘1’, the CLKOUT output waveforms that

appear when bits RS1 and RS0 are set to ‘01’ or ‘10’

are not as responsive to the setting of the Calibration

register. For example, when outputting the 4.096 kHz

waveform (RS1, RS0 set to ‘01’), the output waveform

is generated using only eight input clock cycles.

Consequently, attempting to subtract more than eight

input clock cycles from this output does not have a

meaningful affect on the resulting waveform. Any

affect on the output will appear as a modification in

both the frequency and duty cycle of the waveform

appearing on the CLKOUT output pin.

FIGURE 9-1:

CLKOUT WAVEFORM

Method 2. RS2 bit set to ‘1’

With the RS2 bit set to ‘1’, the following internal timing

signal is output on the CLKOUT pin:

RS2 RS1 RS0

Output Signal

1

x

x

1.0 Hz

The frequency listed in the table presumes an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

RS2 RS1 RS0

Output Signal

1

x

x

32768

Unlike the method previously described, the

calibration setting is continuously applied and affects

every cycle of the output waveform. This results in the

modulation of the frequency of the output waveform

based upon the setting of the Calibration register.

Using this setting, the calibration function can be

expressed as:

Toutput = (32768 +/- (2 * CALREG)) Tinput

where:

Toutput = clock period of CLKOUT output

signal

Tinput = clock period of input signal

CALREG = decimal value of Calibration

register setting and the sign is

determined by the CALSGN bit.

Since the calibration is done every cycle, the frequency

of the output CLKOUT waveform is constant.

Delay

 2011-2012 Microchip Technology Inc.

Preliminary

DS22280C-page 29

Share Link: