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PIC24HJ128GP802-I/ML View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
PIC24HJ128GP802-I/ML
Microchip
Microchip Technology 
PIC24HJ128GP802-I/ML Datasheet PDF : 357 Pages
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PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
REGISTER 9-1: OSCCON: OSCILLATOR CONTROL REGISTER(1) (CONTINUED)
bit 2
Unimplemented: Read as ‘0
bit 1
LPOSCEN: Secondary (LP) Oscillator Enable bit
1 = Enable secondary oscillator
0 = Disable secondary oscillator
bit 0
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
Note 1: Writes to this register require an unlock sequence. Refer to Section 39. “Oscillator (Part III)” (DS70308)
in the “dsPIC33F Family Reference Manual” (available from the Microchip website) for details.
2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
This applies to clock switches in either direction. In these instances, the application must switch to FRC mode
as a transition clock source between the two PLL modes.
DS70293D-page 124
Preliminary
© 2009 Microchip Technology Inc.

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