AT90PWM2/3/2B/3B
10. Interrupts
This section describes the specifics of the interrupt handling as performed in
AT90PWM2/2B/3/3B. For a general explanation of the AVR interrupt handling, refer to “Reset
and Interrupt Handling” on page 16.
10.1 Interrupt Vectors in AT90PWM2/2B/3/3B
4317K–AVR–03/2013
Table 10-1. Reset and Interrupt Vectors
Vector
No.
Program
Address
Source
1
0x0000
RESET
2
0x0001 PSC2 CAPT
3
0x0002 PSC2 EC
4
0x0003 PSC1 CAPT
5
0x0004 PSC1 EC
6
0x0005 PSC0 CAPT
7
0x0006 PSC0 EC
8
0x0007 ANACOMP 0
9
0x0008 ANACOMP 1
10
0x0009 ANACOMP 2
11
0x000A INT0
12
0x000B TIMER1 CAPT
13
0x000C TIMER1 COMPA
14
0x000D TIMER1 COMPB
15
0x000E
16
0x000F TIMER1 OVF
17
0x0010 TIMER0 COMPA
18
0x0011 TIMER0 OVF
19
0x0012 ADC
20
0x0013 INT1
21
0x0014 SPI, STC
22
0x0015 USART0, RX
23
0x0016 USART0, UDRE
24
0x0017 USART0, TX
25
0x0018 INT2
26
0x0019 WDT
27
0x001A EE READY
28
0x001B TIMER0 COMPB
Interrupt Definition
External Pin, Power-on Reset, Brown-out Reset,
Watchdog Reset, and Emulation AVR Reset
PSC2 Capture Event
PSC2 End Cycle
PSC1 Capture Event
PSC1 End Cycle
PSC0 Capture Event
PSC0 End Cycle
Analog Comparator 0
Analog Comparator 1
Analog Comparator 2
External Interrupt Request 0
Timer/Counter1 Capture Event
Timer/Counter1 Compare Match A
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter0 Compare Match A
Timer/Counter0 Overflow
ADC Conversion Complete
External Interrupt Request 1
SPI Serial Transfer Complete
USART0, Rx Complete
USART0 Data Register Empty
USART0, Tx Complete
External Interrupt Request 2
Watchdog Time-Out Interrupt
EEPROM Ready
Timer/Counter0 Compare Match B
57