DSPIC33FJ64GP310AT-I/PF View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ64GP310AT-I/PF Datasheet PDF : 322 Pages
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dsPIC33FJXXXGPX06/X08/X10
REGISTER 7-14: IEC4: INTERRUPT ENABLE CONTROL REGISTER 4
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
U-0
C2TXIE
C1TXIE
DMA7IE
DMA6IE
—
bit 7
R/W-0
U2EIE
R/W-0
U1EIE
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
C2TXIE: ECAN2 Transmit Data Request Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C1TXIE: ECAN1 Transmit Data Request Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA7IE: DMA Channel 7 Data Transfer Complete Enable Status bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DMA6IE: DMA Channel 6 Data Transfer Complete Enable Status bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
U2EIE: UART2 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1EIE: UART1 Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
© 2009 Microchip Technology Inc.
DS70286C-page 105
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