DSPIC33FJ64GP310AT-I/PF View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ64GP310AT-I/PF Datasheet PDF : 322 Pages
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dsPIC33FJXXXGPX06/X08/X10
REGISTER 19-18: CiFMSKSEL1: ECAN™ FILTER 7-0 MASK SELECTION REGISTER
R/W-0
R/W-0
F7MSK<1:0>
bit 15
R/W-0
R/W-0
F6MSK<1:0>
R/W-0
R/W-0
F5MSK<1:0>
R/W-0
R/W-0
F4MSK<1:0>
bit 8
R/W-0
R/W-0
F3MSK<1:0>
bit 7
R/W-0
R/W-0
F2MSK<1:0>
R/W-0
R/W-0
F1MSK<1:0>
R/W-0
R/W-0
F0MSK<1:0>
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-12
bit 11-10
bit 9-8
bit 7-6
bit 5-4
bit 3-2
bit 1-0
F7MSK<1:0>: Mask Source for Filter 7 bit
F6MSK<1:0>: Mask Source for Filter 6 bit
F5MSK<1:0>: Mask Source for Filter 5 bit
F4MSK<1:0>: Mask Source for Filter 4 bit
F3MSK<1:0>: Mask Source for Filter 3 bit
F2MSK<1:0>: Mask Source for Filter 2 bit
F1MSK<1:0>: Mask Source for Filter 1 bit
F0MSK<1:0>: Mask Source for Filter 0 bit
11 = Reserved
10 = Acceptance Mask 2 registers contain mask
01 = Acceptance Mask 1 registers contain mask
00 = Acceptance Mask 0 registers contain mask
DS70286C-page 208
© 2009 Microchip Technology Inc.
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