DSPIC33FJ64GP706AI/PF View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
DSPIC33FJ64GP706AI/PF Datasheet PDF : 350 Pages
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dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 21-1: ADxCON1: ADCx CONTROL REGISTER 1 (where x = 1 or 2)
R/W-0
ADON
bit 15
U-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
—
ADSIDL ADDMABM
—
AD12B
FORM<1:0>
bit 8
R/W-0
bit 7
R/W-0
SSRC<2:0>
R/W-0
U-0
R/W-0
R/W-0
R/W-0
R/C-0
HC,HS
HC, HS
—
SIMSAM
ASAM
SAMP
DONE
bit 0
Legend:
R = Readable bit
-n = Value at POR
HC = Cleared by hardware
W = Writable bit
‘1’ = Bit is set
HS = Set by hardware
C = Clear only bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7-5
bit 4
ADON: ADC Operating Mode bit
1 = ADC module is operating
0 = ADC is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
ADDMABM: DMA Buffer Build Mode bit
1 = DMA buffers are written in the order of conversion. The module will provide an address to the DMA
channel that is the same as the address used for the non-DMA stand-alone buffer
0 = DMA buffers are written in Scatter/Gather mode. The module will provide a scatter/gather address
to the DMA channel, based on the index of the analog input and the size of the DMA buffer
Unimplemented: Read as ‘0’
AD12B: 10-Bit or 12-Bit Operation Mode bit
1 = 12-bit, 1-channel ADC operation
0 = 10-bit, 4-channel ADC operation
FORM<1:0>: Data Output Format bits
For 10-bit operation:
11 = Signed fractional (DOUT = sddd dddd dd00 0000, where s = .NOT.d<9>)
10 = Fractional (DOUT = dddd dddd dd00 0000)
01 = Signed integer (DOUT = ssss sssd dddd dddd, where s = .NOT.d<9>)
00 = Integer (DOUT = 0000 00dd dddd dddd)
For 12-bit operation:
11 = Signed fractional (DOUT = sddd dddd dddd 0000, where s = .NOT.d<11>)
10 = Fractional (DOUT = dddd dddd dddd 0000)
01 = Signed Integer (DOUT = ssss sddd dddd dddd, where s = .NOT.d<11>)
00 = Integer (DOUT = 0000 dddd dddd dddd)
SSRC<2:0>: Sample Clock Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = Reserved
100 = GP timer (Timer5 for ADC1, Timer3 for ADC2) compare ends sampling and starts conversion
011 = Reserved
010 = GP timer (Timer3 for ADC1, Timer5 for ADC2) compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing sample bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
DS70593C-page 242
© 2011 Microchip Technology Inc.
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