dsPIC33FJXXXGPX06A/X08A/X10A
TABLE 22-2: dsPIC33FJXXXGPX06A/X08A/X10A CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
RTSP
Effect
Description
GWRP
IESO
FNOSC<2:0>
FGS
Immediate General Segment Write-Protect bit
1 = User program memory is not write-protected
0 = User program memory is write-protected
FOSCSEL Immediate Two-speed Oscillator Start-up Enable bit
1 = Start-up device with FRC, then automatically switch to the user-selected
oscillator source when ready
0 = Start-up device with user-selected oscillator source
FOSCSEL If clock Initial Oscillator Source Selection bits
switch is 111 = Internal Fast RC (FRC) oscillator with postscaler
enabled, 110 = Internal Fast RC (FRC) oscillator with divide-by-16
RTSP 101 = LPRC oscillator
effect is 100 = Secondary (LP) oscillator
on any 011 = Primary (XT, HS, EC) oscillator with PLL
device 010 = Primary (XT, HS, EC) oscillator
Reset; 001 = Internal Fast RC (FRC) oscillator with PLL
otherwise, 000 = FRC oscillator
Immediate
FCKSM<1:0>
OSCIOFNC
POSCMD<1:0>
FWDTEN
FOSC
FOSC
FOSC
FWDT
Immediate Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Immediate OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Immediate Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Immediate Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
Clearing the SWDTEN bit in the RCON register will have no effect.)
0 = Watchdog Timer enabled/disabled by user software (LPRC can be dis-
abled by clearing the SWDTEN bit in the RCON register)
WINDIS
PLLKEN
WDTPRE
WDTPOST
FWDT
FWDT
FWDT
FWDT
Immediate Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Immediate PLL Lock Enable bit
1 = Clock switch to PLL source will wait until the PLL lock signal is valid.
0 = Clock switch will not wait for the PLL lock signal.
Immediate Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Immediate Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
•
•
•
0001 = 1:2
0000 = 1:1
DS70593C-page 254
© 2011 Microchip Technology Inc.