dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
REGISTER 21-5: CiFIFO: ECAN™ FIFO STATUS REGISTER
U-0
—
bit 15
U-0
R-0
R-0
R-0
R-0
—
FBP<5:0>
R-0
R-0
bit 8
U-0
—
bit 7
U-0
R-0
R-0
R-0
R-0
—
FNRB<5:0>
R-0
R-0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-6
bit 5-0
Unimplemented: Read as ‘0’
FBP<5:0>: FIFO Buffer Pointer bits
011111 = RB31 buffer
011110 = RB30 buffer
•
•
•
000001 = TRB1 buffer
000000 = TRB0 buffer
Unimplemented: Read as ‘0’
FNRB<5:0>: FIFO Next Read Buffer Pointer bits
011111 = RB31 buffer
011110 = RB30 buffer
•
•
•
000001 = TRB1 buffer
000000 = TRB0 buffer
DS70291G-page 262
© 2007-2012 Microchip Technology Inc.