DSPIC33FJ32MC302-I View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

DSPIC33FJ32MC302-I

16-bit Digital Signal Controllers (up to 128 KB Flash and 16K SRAM) with Motor Control PWM and Advanced Analog

Microchip Technology 

dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04

TABLE 31-44: ADC MODULE SPECIFICATIONS (12-BIT MODE)

AC CHARACTERISTICS

Standard Operating Conditions: 3.0V to 3.6V

(unless otherwise stated)

Operating temperature -40°C ≤ TA ≤ +85°C for Industrial

-40°C ≤TA ≤+125°C for Extended

Param

No.

Symbol

Characteristic

Min Typ Max Units

Conditions

AD20a Nr

ADC Accuracy (12-bit Mode) – Measurements with external VREF+/VREF-

Resolution(1)

12 data bits

bits

AD21a INL

Integral Nonlinearity

-2

—

+2

LSb VINL = AVSS = VREFL = 0V, AVDD

= VREFH = 3.6V

AD22a DNL

Differential Nonlinearity

>-1

—

<1

LSb VINL = AVSS = VREFL = 0V, AVDD

= VREFH = 3.6V

AD23a GERR Gain Error

—

3.4

10

LSb VINL = AVSS = VREFL = 0V, AVDD

= VREFH = 3.6V

AD24a EOFF Offset Error

—

0.9

5

LSb VINL = AVSS = VREFL = 0V, AVDD

= VREFH = 3.6V

AD25a

— Monotonicity

—

—

—

— Guaranteed

AD20a Nr

ADC Accuracy (12-bit Mode) – Measurements with internal VREF+/VREF-

Resolution(1)

12 data bits

bits

AD21a INL

Integral Nonlinearity

-2

—

+2 LSb VINL = AVSS = 0V, AVDD = 3.6V

AD22a DNL

Differential Nonlinearity

>-1

—

<1 LSb VINL = AVSS = 0V, AVDD = 3.6V

AD23a GERR Gain Error

2

10.5 20 LSb VINL = AVSS = 0V, AVDD = 3.6V

AD24a EOFF Offset Error

2

3.8

10 LSb VINL = AVSS = 0V, AVDD = 3.6V

AD25a —

Monotonicity

—

—

—

— Guaranteed

Dynamic Performance (12-bit Mode)

AD30a THD

Total Harmonic Distortion —

—

-75 dB

—

AD31a SINAD Signal to Noise and

68.5 69.5 —

dB

—

Distortion

AD32a SFDR Spurious Free Dynamic

80

—

—

dB

—

Range

AD33a FNYQ Input Signal Bandwidth

—

— 250 kHz

—

AD34a ENOB Effective Number of Bits 11.09 11.3 — bits

—

Note 1: Injection currents > |0| can affect the ADC results by approximately 4 to 6 counts (i.e., VIH source > (VDD +

0.3V) or VIL source < (VSS – 0.3V).

© 2007-2012 Microchip Technology Inc.

DS70291G-page 401

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