STM32L152VCT6DTR View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32L152VCT6DTR

Ultra-low-power 32-bit MCU ARM®-based Cortex®-M3, 256KB Flash, 32KB SRAM, 8KB EEPROM, LCD, USB, ADC, DAC

STMicroelectronics 

STM32L151xC STM32L152xC

Electrical characteristics

Table 56. ADC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max Unit

tS(5) Sampling time

tCONV

Total conversion time

(including sampling time)

Direct channels

2.4 V ≤VDDA ≤3.6 V

Multiplexed channels

2.4 V ≤VDDA ≤3.6 V

Direct channels

1.8 V ≤VDDA ≤2.4 V

Multiplexed channels

1.8 V ≤VDDA ≤2.4 V

-

fADC = 16 MHz

-

0.25

-

-

0.56

-

0.56

-

-

µs

-

1

-

-

4

-

384 1/fADC

1

-

24.75 µs

4 to 384 (sampling phase) +12

(successive approximation)

1/fADC

CADC

Internal sample and hold

capacitor

Direct channels

Multiplexed channels

-

-

16

pF

-

-

fTRIG

External trigger frequency

Regular sequencer

fTRIG

External trigger frequency

Injected sequencer

RAIN(6) Signal source impedance

tlat

Injection trigger conversion

latency

tlatr

tSTAB

Regular trigger conversion

latency

Power-up time

12-bit conversions

-

6/8/10-bit conversions

-

12-bit conversions

-

6/8/10-bit conversions

-

-

fADC = 16 MHz

219

-

3.5

fADC = 16 MHz

156

-

2.5

-

-

-

Tconv+1 1/fADC

-

Tconv 1/fADC

-

Tconv+2 1/fADC

-

Tconv+1 1/fADC

-

50

kΩ

-

281

ns

-

4.5 1/fADC

-

219

ns

-

3.5 1/fADC

-

3.5

µs

1. The Vref+ input can be grounded if neither the ADC nor the DAC are used (this allows to shut down an external voltage

reference).

2. The current consumption through VREF is composed of two parameters:

- one constant (max 300 µA)

- one variable (max 400 µA), only during sampling time + 2 first conversion pulses

So, peak consumption is 300+400 = 700 µA and average consumption is 300 + [(4 sampling + 2) /16] x 400 = 450 µA at

1Msps

3. RVReEfeFr+tocaSnebcetioinnte4r:nPailnlydceosncnriepcttioendstofoVr DfuDrAthaenrddeVtRaEilsF.- can be internally connected to VSSA, depending on the package.

4. VSSA or VREF- must be tied to ground.

5. Minimum sampling time is reached for an external input impedance limited to a value as defined in Table 58: Maximum

source impedance RAIN max.

6. External impedance has another high value limitation when using short sampling time as defined in Table 58: Maximum

source impedance RAIN max.

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