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STM32F373R8T6(2013) View Datasheet(PDF) - STMicroelectronics

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STM32F373R8T6 Datasheet PDF : 131 Pages
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STM32F37xxx
Electrical characteristics
6.2
Absolute maximum ratings
Stresses above the absolute maximum ratings listed in Table 19: Voltage characteristics,
Table 20: Current characteristics, and Table 21: Thermal characteristics may cause
permanent damage to the device. These are stress ratings only and functional operation of
the device at these conditions is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Symbol
Table 19. Voltage characteristics(1)
Ratings
Min
Max
Unit
VDD–VSS
External main supply voltage (including VDDA, VDDSDx,
VBAT and VDD)
0.3
4.0
VDD–VDDA Allowed voltage difference for VDD > VDDA
-
0.4
VDDSDx – VDDA Allowed voltage difference for VDDSDx > VDDA
-
0.4
VREFSD+
VDDSD3
VREF+ – VDDA
Allowed voltage difference for VREFSD+ > VDDSD3
Allowed voltage difference for VREF+ > VDDA
-
0.4
V
-
0.4
Input voltage on FT and FTf pins
VSS 0.3 VDD + 4.0
VIN(2)
Input voltage on TTa pins
Input voltage on TC pins on SDADCx channels inputs(3)
VSS 0.3
VSS 0.3
4.0
4.0
Input voltage on any other pin
VSS 0.3
4.0
|VSSX VSS| Variations between all the different ground pins
50
mV
VESD(HBM) Electrostatic discharge voltage (human body model)
see Section 6.3.12:
Electrical sensitivity
characteristics
1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the
permitted range.
2. VIN maximum must always be respected. Refer to Table 20: Current characteristics for the maximum allowed injected
current values.
3. VDDSD12 is the external power supply for PB2, PB10, and PE7 to PE15 I/O pins (I/O ground pin is internally connected to
VSS). VDDSD3 is the external power supply for PB14 to PB15 and PD8 to PD15 I/O pins (I/O ground pin is internally
connected to VSS).
All main power (VDD, VDDSD12, VDDSD3 and VDDA) and ground (VSS, VSSSD, and VSSA) pins
must always be connected to the external power supply, in the permitted range.
The following relationship must be respected between VDDA and VDD: VDDA must power on
before or at the same time as VDD in the power up sequence. VDDA must be greater than or
equal to VDD.
The following relationship must be respected between VDDA and VDDSD12: VDDA must power
on before or at the same time as VDDSD12 or VDDSD3 in the power up sequence. VDDA must
be greater than or equal to VDDSD12 or VDDSD3.
The following relationship must be respected between VDDSD12 and VDDSD3: VDDSD3 must
power on before or at the same time as VDDSD12 in the power up sequence.
After power up (VDDSD12 > Vrefint = 1.2 V) VDDSD3 can be higher or lower than VDDSD12.
The following relationship must be respected between VREFSD+ and VDDSD12, VDDSD3:
VREFSD+ must be lower than VDDSD3.
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