STM32F373RBT7(2013) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F373RBT7
(Rev.:2013)

ARM Cortex-M4 32b MCU+FPU, up to 256KB Flash+32KB SRAM timers, 4 ADCs (12/16-bit), 3 DACs, 2 comp., 2.0-3.6 V operation

STMicroelectronics 

Electrical characteristics

STM32F37xxx

6.3.14 I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 52 are derived from tests

performed under the conditions summarized in Table 22. All I/Os are CMOS and TTL

compliant.

Table 52. I/O static characteristics (1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Low level input

voltage

VIH

High level input

voltage

Vhys

Schmitt trigger

hysteresis

TC and TTa I/O

FT and FTf I/O

BOOT0

All I/Os except BOOT0 pin

TC and TTa I/O

FT and FTf I/O

BOOT0

All I/Os except BOOT0 pin

TC and TTa I/O

FT and FTf I/O

BOOT0

-

-

0.3VDD+0.07(2)

-

- 0.475VDD–0.2(2)

-

-

0.3VDD–0.3(2)

-

-

0.445VDD+0.398(2) -

0.5VDD+0.2(2)

-

0.2VDD+0.95(2)

-

0.3VDD

V

-

-

-

0.7VDD

-

-

-

200(2)

-

-

100(2)

-

mV

-

300(2)

-

Ilkg

Input leakage

current (3)

Weak pull-up

RPU equivalent

resistor(4)

Weak pull-down

RPD equivalent

resistor(4)

TC, FT and FTf I/O

TTa in digital mode

VSS < VIN < VDD

TTa in digital mode

VDD ≤ VIN ≤ VDDA

TTa in analog mode

VSS ≤ VIN ≤ VDDA

FT and FTf I/O (3)

VDD ≤ VIN ≤ 5 V

VIN = VSS

VIN = VDD

-

-

±0.1

-

-

1

µA

-

-

±0.2

-

-

10

25

40

55

kΩ

25

40

55

CIO I/O pin capacitance

-

5

-

pF

1. VDDSD12 is the external power supply for the PB2, PB10, and PE7 to PE15 I/O pins (the I/O pin ground is internally

connected to VSS). VDDSD3 is the external power supply for PB14 to PB15 and PD8 to PD15 I/O pins (the I/O pin ground

is internally connected to VSS). For those pins all VDD supply references in this table are related to their given VDDSDx

power supply.

2. Data based on design simulation only. Not tested in production.

3. Leakage could be higher than maximum value, if negative current is injected on adjacent pins.

4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

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